ADC0803LCN/NOPB National Semiconductor, ADC0803LCN/NOPB Datasheet - Page 31

IC ADC 8BIT MPU COMPAT 20-DIP

ADC0803LCN/NOPB

Manufacturer Part Number
ADC0803LCN/NOPB
Description
IC ADC 8BIT MPU COMPAT 20-DIP
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC0803LCN/NOPB

Number Of Bits
8
Number Of Converters
1
Power Dissipation (max)
875mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Number Of Elements
1
Resolution
8Bit
Architecture
SAR
Sample Rate
10KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
5V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
5V
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
6.3V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
875mW
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Package Type
PDIP
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*ADC0803LCN
Functional Description
The following schematic and sample subroutine (DATA IN)
may be used to interface (up to) 8 ADC0801’s directly to the
MC6800 CPU. This scheme can easily be extended to allow
the interface of more converters. In this configuration the
converters are (arbitrarily) located at HEX address 5000 in
the MC6800 memory space. To save components, the clock
signal is derived from just one RC pair on the first converter.
This output drives the other A/Ds.
All the converters are started simultaneously with a STORE
instruction at HEX address 5000. Note that any other HEX
address of the form 5XXX will be decoded by the circuit,
pulling all the CS inputs low. This can easily be avoided by
using a more definitive address decoding scheme. All the
interrupts are ORed together to insure that all A/Ds have
completed their conversion before the microprocessor is
interrupted.
The subroutine, DATA IN, may be called from anywhere in
the user’s program. Once called, this routine initializes the
SAMPLE PROGRAM FOR Figure 16 ADC0801–MC6820 PIA INTERFACE
(Continued)
31
CPU, starts all the converters simultaneously and waits for
the interrupt signal. Upon receiving the interrupt, it reads the
converters (from HEX addresses 5000 through 5007) and
stores the data successively at (arbitrarily chosen) HEX
addresses 0200 to 0207, before returning to the user’s pro-
gram. All CPU registers then recover the original data they
had before servicing DATA IN.
5.2 Auto-Zeroed Differential Transducer Amplifier
and A/D Converter
The differential inputs of the ADC0801 series eliminate the
need to perform a differential to single ended conversion for
a differential transducer. Thus, one op amp can be elimi-
nated since the differential to single ended conversion is
provided by the differential input of the ADC0801 series. In
general, a transducer preamp is required to take advantage
of the full A/D converter input dynamic range.
DS005671-A2
www.national.com

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