LTC1196-2BCS8#TRPBF Linear Technology, LTC1196-2BCS8#TRPBF Datasheet - Page 26
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LTC1196-2BCS8#TRPBF
Manufacturer Part Number
LTC1196-2BCS8#TRPBF
Description
IC A/DCONV 8BIT 1MHZ SAMPL 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1196-2BCS8PBF.pdf
(28 pages)
Specifications of LTC1196-2BCS8#TRPBF
Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
Serial
Number Of Converters
1
Power Dissipation (max)
50mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC1196/LTC1198
TYPICAL APPLICATIONS
Once RINT is generated the code begins execution at
the label RINT. This code stores the D
LTC1198 in the ACC and then stores it in location 200
hex. The data appears in location 200 hex right-justifi ed
as shown in Figure 19. The code is set up to continually
loop, so at this point the code jumps to label TXRX and
repeats from here.
26
LABEL
INIT
TXRX
RINT
MNEMONIC
AORG
B
AORG
B
AORG
DINT
LDPK
LARP
LRLK
LACK
SACL
STXM
FORT
LACK
SFSM
RPTK
SFL
SACL
EINT
RPTK
NOP
ZALS
SACL
B
END
Figure 20. TMS320C25 Code for the Circuit in Figure 15
OUT
word from the
0
INIT
>26
RINT
>32
>0
>1
AR1, >200
>10
>4
0
>44
7
>1
2
>0
*, 0
TXRX
COMMENTS
ON RESET CODE EXECUTION STARTS AT 0
BRANCH TO INITIALIZATION ROUTINE
ADDRESS TO RINT INTERRUPT VECTOR
BRANCH TO RINT SERVICE ROUTINE
MAIN PROGRAM STARTS HERE
DISABLE INTERRUPTS
SET DATA MEMORY PAGE POINTER TO 0
SET AUXILIARY REGISTER POINTER TO 1
SET AUXILIARY REGISTER 1 TO >200
LOAD IMR CONFIG WORD INTO ACC
STORE IMR CONFIG WORD INTO IMR
CONFIGURE FSX AS AN OUTPUT
SET SERIAL PORT TO 16-BIT MODE
LOAD LTC1198 D
FSX PULSES GENERATED ON XSR LOAD
REPEAT NEXT INSTRUCTION 8 TIMES
SHIFTS D
PUT D
ENABLE INTERRUPT (DISABLE ON RINT)
MINIMIZE THE CONVERSION CYCLE TIME
TO BE 20 CLOCK CYCLES
STORE LTC1198 D
STORE ACC IN LOCATION >200
BRANCH TO TRANSMIT RECEIVE ROUTINE
IN
D
WORD IN TRANSMIT REGISTER
Figure 19. Memory Map for the Circuit in Figure 15
OUT
IN
X
WORD TO RIGHT POSITION
FROM LTC1198 STORED IN TMS320C25 RAM
X
X
IN
OUT
WORD INTO ACC
X
WORD IN ACC
X
X
X
X
7
MSB
6
5
4
3
2
1
L1196/98 F19
LSB
0
119698fb
> 200