LTC2436-1CGN#TR Linear Technology, LTC2436-1CGN#TR Datasheet
![IC CONV A/D 16B 2CH DIFF 16SSOP](/photos/6/59/65965/161-16-ssop_sml.jpg)
LTC2436-1CGN#TR
Specifications of LTC2436-1CGN#TR
Available stocks
Related parts for LTC2436-1CGN#TR
LTC2436-1CGN#TR Summary of contents
Page 1
... Through a single pin, the REF LTC2436-1 can be configured for better than 87dB input differential mode rejection at 50Hz and 60Hz 2 can be driven by an external oscillator for a user defined rejection frequency. The internal oscillator requires no external frequency setting components ...
Page 2
... Reference Input Voltage to GND .................................... – 0. Digital Input Voltage to GND ........ – 0. Digital Output Voltage to GND ..... – 0. Operating Temperature Range LTC2436-1C ............................................ LTC2436-1I ........................................ – Storage Temperature Range ................. – 150 C Lead Temperature (Soldering, 10 sec).................. 300 C ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T PARAMETER CONDITIONS Resolution (No Missing Codes) 0 ...
Page 3
... C. (Note 3) A CONDITIONS + Voltage – Voltage + Voltage – Voltage + 5V GND CC – 5V 5. 5V, REF = 5.5V CC – 5V, REF = GND CC LTC2436-1 MIN TYP MAX UNITS 130 140 dB 140 130 140 dB 120 dB 120 dB MIN TYP MAX UNITS GND – GND – – ...
Page 4
... LTC2436 DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS Low Level Input Voltage IL CS High Level Input Voltage IH SCK V Low Level Input Voltage IL SCK I Digital Input Current IN CS Digital Input Current ...
Page 5
... O Note 12: 800nV RMS noise is independent of V performance is limited by the quantization, lowering V effective resolution. Note 13: Guaranteed by design and test correlation. = 139,800Hz 2% Note 14: The low sleep mode current is valid only when CS is high. LTC2436-1 MIN TYP MAX UNITS 2.56 2000 0.25 390 ...
Page 6
... LTC2436 CTIO S V (Pin 1): Positive Supply Voltage. Bypass to GND with tantalum capacitor in parallel with 0.1 F ceramic capacitor as close to the part as possible. + – REF (Pin 2), REF (Pin 3): Differential Reference Input. The voltage on these pins can have any value between GND and V as long as the reference positive input, REF ...
Page 7
... SDO 1.69k Hi Hi AUTOCALIBRATION AND CONTROL + IN DIFFERENTIAL 3RD ORDER – MODULATOR IN + – DECIMATING FIR CH0/CH1 Figure 1. Functional Block Diagram C = 20pF LOAD 24361 TA03 LTC2436-1 INTERNAL OSCILLATOR F O (INT/EXT) SCK SERIAL SDO INTERFACE CS PING-PONG 24361 1.69k SDO C = 20pF LOAD Hi Hi-Z OL 24361 TA04 ...
Page 8
... ADC or when CS is brought HIGH. The device automatically initiates a new conversion and the cycle repeats. In order to maintain compatibility with 24-/32-bit data transfers possible to clock the LTC2436-1 with additional serial clock pulses. This results in additional data bits which are always logic HIGH. ...
Page 9
... Output Data Format The LTC2436-1 serial output data stream is 19 bits long. The first 3 bits represent status information indicating the conversion state, selected channel and sign. The next 16 bits are the conversion result, MSB first. The third and fourth bit together are also used to indicate an underrange condition (the differential input voltage is below – ...
Page 10
... If both Bit 16 and Bit 15 are HIGH, the differential input voltage is above +FS. If both Bit 16 and Bit 15 are LOW, the differential input voltage is below –FS. The function of these bits is summarized in Table 1. Table 1. LTC2436-1 Status Bits Bit 18 Input Range EOC V 0.5 • ...
Page 11
... Figure 4. For this simultaneous 50Hz/ 60Hz rejection, F should be connected to GND. O When a fundamental rejection frequency different from the range 49Hz to 61.2Hz is required or when the converter must be sychronized with an outside source, the LTC2436-1 can operate with an external conversion clock. The conveter W U Bit 18 Bit 17 ...
Page 12
... In the Internal SCK mode of operation, the SCK pin output and the LTC2436-1 creates its own serial clock by dividing the internal conversion clock the External SCK mode of operation, the SCK pin is used as input. The internal or external SCK mode is selected on power-up and then reselected every time a HIGH-to-LOW transition is detected at the CS pin ...
Page 13
... APPLICATIO S I FOR ATIO In addition, the CS signal can be used to trigger a new conversion cycle before the entire serial data transfer has been completed. The LTC2436-1 will abort any serial data transfer in progress and start a new conversion cycle anytime a LOW-to-HIGH transition is detected at the CS pin after the converter has entered the data output state (i ...
Page 14
... SCK, see Figure 7. On the rising edge of CS, the device aborts the data output state and imme- diately initiates a new conversion. This is useful for abort- ing an invalid conversion cycle or synchronizing the start of a conversion. 2. LTC2436 REFERENCE REF VOLTAGE 3 – 0. REF SCK CC ...
Page 15
... ANALOG INPUT RANGE 6 –0.5V TO 0.5V + REF REF CH1 7 – GND CH1 BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 EOC CH0/CH1 SIG MSB DATA OUTPUT LTC2436-1 = EXTERNAL CLOCK SOURCE = INTERNAL OSC/SIMULTANEOUS 50Hz/60Hz REJECTION 2-WIRE INTERFACE 8, 9, 10, 15, 16 BIT 13 BIT 2 BIT 1 BIT 0 LSB CONVERSION 24361 F08 24361f 15 ...
Page 16
... CS. This can be avoided by adding an external 10k pull-up resistor to the SCK pin or by never pulling CS HIGH when SCK is LOW. Whenever SCK is LOW, the LTC2436-1’s internal pull-up at pin SCK is disabled. Normally, SCK is not externally driven if the device is in the internal SCK timing mode. ...
Page 17
... POR cycle; therefore, the internal serial clock timing mode is automatically selected if SCK is not externally driven LOW (if SCK is loaded such that the internal pull-up cannot pull the pin HIGH, the external SCK mode will be selected). LTC2436 EXTERNAL CLOCK SOURCE 14 ...
Page 18
... MSB DATA OUTPUT Figure 11. Internal Serial Clock, Continuous Operation Digital Signal Levels The LTC2436-1’s digital interface is easy to use. Its digital inputs (F accept standard TTL/CMOS logic levels and the internal hysteresis receivers can tolerate edge rates as slow as 100 s. However, some considerations are required to take advantage of the exceptional accuracy and low supply current of this converter ...
Page 19
... F the differential input and reference connections. Driving the Input and Reference The input and reference pins of the LTC2436-1 converter are directly connected to a network of sampling capaci- tors. Depending upon the relation between the differential input voltage and the differential reference voltage, these capacitors are switching between these four pins transfering small amounts of charge in the process ...
Page 20
... The effect of this input dynamic current can be analyzed using the test circuit of Figure 13. The C includes the LTC2436-1 pin capacitance (5pF typical) plus the capacitance of the test fixture used to obtain the results shown in Figures 14 and 15. A careful implementation can ...
Page 21
... Nevertheless, when small values of C are unavoidably present as parasitics IN of input multiplexers, wires, connectors or sensors, the LTC2436-1 can maintain its accuracy while operating with relative large values of source resistance as shown 10k 100k ...
Page 22
... A 15k source resistance will create a 0LSB typical and 1LSB maximum offset voltage. Reference Current In a similar fashion, the LTC2436-1 samples the differen- tial reference pins REF of charge to and from the external driving circuits thus producing a dynamic reference current. This current does not change the converter offset, but it may degrade the gain and INL performance ...
Page 23
... REF (Small C ) Figure 20. –FS Error 0. 0.1 F 24361 F21 + – and REF (Large C ) Figure 22. –FS Error vs R REF LTC2436-1 + – and REF pins and external capacitance = LOW (internal oscillator and 50Hz/60Hz notch), of source resistance driving REF 0.01 F REF C = 0.001 F REF C = 100pF ...
Page 24
... When operated with an external conversion clock (F oscillator), the LTC2436-1 output data rate can be in- creased as desired. The duration of the conversion phase is 20510/f haves as if the internal oscillator is used with simultaneous 50Hz/60Hz ...
Page 25
... If small external input and/ EOSC or reference capacitors ( are used, the effect of IN REF the external source resistance upon the LTC2436-1 typical performance can be inferred from Figures 14, 15, 19 and 20 in which the horizontal axis is scaled by 139,800 REF = 5V – ...
Page 26
... Reducing the reference voltage is func- tionally equivalent to amplifying the input signal, however no amplifier is required. The LTC2436-1 has LSB when used with a 5V reference, however the thermal noise of the inputs is 800nV and is independent of reference voltage. Thus ...
Page 27
... TYP .015 .004 45 .053 – .068 (0.38 0.10) (1.351 – 1.727) 0 – 8 TYP .008 – .012 (0.203 – 0.305) LTC2436-1 .189 – .196* (4.801 – 4.978) .009 (0.229 REF .150 – .157** (3.810 – 3.988) 1 ...
Page 28
... No Latency LTC2404/LTC2408 4-/8-Channel, 24-Bit, No Latency LTC2410 24-Bit, Fully Differential, No Latency LTC2411 24-Bit, No Latency LTC2411-1 24-Bit, Simultaneous 50Hz/60Hz Rejection LTC2412 2-Channel, 24-Bit, Pin Compatible with LTC2436-1 LTC2413 24-Bit, No Latency LTC2414/LTC2418 8-/16-Channel, 24-Bit No Latency LTC2415 24-Bit, No Latency LTC2420 20-Bit, No Latency LTC2424/LTC2428 ...