LTC1198-1BCS8#PBF Linear Technology, LTC1198-1BCS8#PBF Datasheet - Page 14
![IC ADC 8BIT 750KHZ SAMPL 8-SOIC](/photos/6/62/66297/8-soic_05-08-1610_sml.jpg)
LTC1198-1BCS8#PBF
Manufacturer Part Number
LTC1198-1BCS8#PBF
Description
IC ADC 8BIT 750KHZ SAMPL 8-SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1196-2BCS8PBF.pdf
(28 pages)
Specifications of LTC1198-1BCS8#PBF
Number Of Bits
8
Sampling Rate (per Second)
750k
Data Interface
Serial
Number Of Converters
1
Power Dissipation (max)
50mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC1196/LTC1198
APPLICATIONS INFORMATION
OVERVIEW
The LTC1196/LTC1198 are 600ns sampling 8-bit A/D con-
verters packaged in tiny 8-pin SO packages and operating
on 3V to 6V supplies. The ADCs draw only 10mW from a
3V supply or 50mW from a 5V supply.
Both the LTC1196 and the LTC1198 contain an 8-bit,
switched-capacitor ADC, a sample-and-hold, and a serial
port (see the Block Diagram). The on-chip sample-and-
holds have full-accuracy input bandwidths of 1MHz.
Although they share the same basic design, the LTC1196
and LTC1198 differ in some respects. The LTC1196 has
a differential input and has an external reference input
pin. It can measure signals fl oating on a DC common
mode voltage and can operate with reduced spans below
1V. The LTC1198 has a 2-channel input multiplexer and
14
D
CLK
OUT
D
CS
IN
D
OUT
CS
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY
B0
START
t
t
SMPL
suCS
SGL/
DIFF
HI-Z
Figure 2. LTC1198 Operating Sequence Example: Differential Inputs (CH1, CH0)
Hi-Z
ODD/
SIGN
t
suCS
t
SMPL
DUMMY
NULL BITS
(2.5 CLKs)
DUMMY
Figure 1. LTC1196 Operating Sequence
B7
NULL BITS
t
CYC
B6
(8.5 CLKs)
t
CYC
t
B5
CYC
B7
(12 CLKs)
(16 CLKs)
can convert either channel with respect to ground or the
difference between the two. It also automatically powers
down when not performing conversion, drawing only
leakage current.
SERIAL INTERFACE
The LTC1196/LTC1198 will interface via three or four wires
to ASICs, PLDs, microprocessors, DSPs, or shift registers
(see Operating Sequence in Figures 1 and 2). To run at their
fastest conversion rates (600ns), they must be clocked at
14.4MHz. HC logic families and any high speed ASIC or
PLD will easily interface to the ADCs at that speed (see
Data Transfer and Typical Application sections). Full speed
operation from a 3V supply can still be achieved with 3V
ASICs, PLDs or HC logic circuits.
B4
B6
t
CONV
(8.5 CLKs)
B3
t
B5
dDO
DON’T CARE
B2
B4
B1
B3
t
dDO
B0*
B2
t
SMPL
B1
Hi-Z
B0*
1196/98 F01
NULL
BITS
POWER
1196/98 F02
DOWN
Hi-Z
119698fb