LTC1415CSW Linear Technology, LTC1415CSW Datasheet
LTC1415CSW
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LTC1415CSW Summary of contents
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... Input Range: 4.096V (1mV/LSB) 28-Pin SSOP and SO Packages O U PPLICATI S A High Speed Data Acquisition Imaging Systems Digital Signal Processing Multiplexed Data Acquisition Systems Telecommunications , LTC and LT are registered trademarks of Linear Technology Corporation TYPICAL A PPLICATI 1.25MHz, 12-Bit Sampling A/D Converter LTC1415 DIFFERENTIAL 1 ANALOG INPUT +A ...
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... With Internal Reference (Notes 5, 6) CONDITIONS (Note 7) (Note OUT(REF) CONDITIONS 4.75V V 5.25V High Between Conversions During Conversions 0V < V < MHz TOP VIEW ORDER PART NUMBER LTC1415CG LTC1415CSW 25 BUSY LTC1415IG LTC1415ISW CONVST SHDN 20 NAP/SLP 19 OGND PACKAGE 28-LEAD PLASTIC SO WIDE = 110 C/W ( 110 C, = 130 C/W (SW) JA MIN ...
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ACCURACY SYMBOL PARAMETER S/( Signal-to-(Noise + Distortion) Ratio THD Total Harmonic Distortion SFDR Spurious Free Dynamic Range IMD Intermodulation Distortion Full-Power Bandwidth Full-Linear Bandwidth TER AL REFERE CE CHARACTERISTICS ...
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LTC1415 CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) Conversion and Acquisition Time t Conversion Time CONV t Acquisition Time ACQ Setup Time CONVST Setup Time 2 ...
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W U TYPICAL PERFORMANCE CHARACTERISTICS S/( Input Frequency and Amplitude 0dB –20dB –60dB 10k 100k 1M 2M INPUT ...
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LTC1415 W U TYPICAL PERFORMANCE CHARACTERISTICS Power Supply Feedthrough vs Ripple Frequency 0 –10 –20 –30 –40 –50 –60 – –80 DGND –90 OV –100 1k 10k 100k RIPPLE FREQUENCY (Hz CTIO S ...
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CTIO AL BLOCK DIAGRA +A IN – 2.5V REF REF REF AMP REFCOMP (4.096V) AGND DGND TEST CIRCUITS Load Circuits for Access Timing DBN DBN (A) Hi AND ...
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LTC1415 U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1415 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 12-bit parallel output. The ADC is complete with a precision reference and an internal ...
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U U APPLICATIONS INFORMATION Effective Number of Bits The effective number of bits (ENOBs measurement of the resolution of an ADC and is directly related to the S/( the equation [S/( ...
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LTC1415 U U APPLICATIONS INFORMATION the presence of another sinusoidal input at a different frequency. If two pure sine waves of frequencies fa and fb are applied to the ADC input, nonlinearities in the ADC transfer func- tion can create ...
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... U U APPLICATIONS INFORMATION The following list is a summary of the op amps that are suitable for driving the LTC1415, more detailed informa- tion is available in the Linear Technology databooks and TM the LinearView CD-ROM. ® LT 1215/LT1216: Dual and quad 23MHz, 50V/ s single supply op amps. Single 5V to 15V supplies, 6.6mA specifications, 90ns settling to 0 ...
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LTC1415 U U APPLICATIONS INFORMATION circuitry. The reference amplifier gains the voltage at the V pin by 1.638 to create the required internal reference REF voltage of 4.096V. This provides buffering between the V pin and the high speed capacitive ...
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U U APPLICATIONS INFORMATION 4.096V to 2.048V and shifts the common mode voltage from half of full scale to 2.274V. AC Coupled Inputs The analog inputs can be AC coupled for applications where the input has no DC information. The ...
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LTC1415 U U APPLICATIONS INFORMATION limitations at high input frequencies (THD = 75dB at 600kHz). The ADC in Figure 10e has a full scale of 2.048V and a common mode of 2.27V. The reduced signal swing of this circuit results ...
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U U APPLICATIONS INFORMATION width for these tracks should be as wide as possible. In applications where the ADC data outputs and control signals are connected to a continuously active micropro- cessor bus possible to get errors in ...
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LTC1415 U U APPLICATIONS INFORMATION ...
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U U APPLICATIONS INFORMATION Figure 13b. Suggested Evaluation Circuit Board Component Side Silkscreen Figure 13c. Suggested Evaluation Circuit Board Component Side Layout W U LTC1415 17 ...
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LTC1415 U U APPLICATIONS INFORMATION Figure 13d. Suggested Evaluation Circuit Board Solder Side Layout DIGITAL INTERFACE The A/D converter is designed to interface with micropro- cessors as a memory mapped device. The CS and RD control inputs are common to ...
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PPLICATI S I FOR ATIO SHDN t 4 CONVST Figure 14b. SHDN to CONVST Wake-Up Timing Timing and Control Conversion start and data read operations are controlled by three digital inputs: CONVST, CS and RD. A ...
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LTC1415 PPLICATI S I FOR ATIO CONVST BUSY DATA Figure 17. Mode 1b CONVST Starts a Conversion. Data is Read by RD CONVST t 6 BUSY RD DATA Figure 18. Mode 2 CONVST Starts ...
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PPLICATI S I FOR ATIO RD = CONVST t 6 BUSY t 10 DATA (N – 1) DATA DB11 TO DB0 CONVST t 6 BUSY t 10 DATA ...
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LTC1415 PACKAGE DESCRIPTIO 0.205 – 0.212** (5.20 – 5.38) 0.005 – 0.009 0.022 – 0.037 (0.13 – 0.22) (0.55 – 0.95) * DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSIONS DO ...
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... DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... SAMPLE Best Dynamic Performance, f 800ksps, 80mW Dissipation SAMPLE Best Dynamic Performance, THD = 84 and SINAD = 71 at Nyquist 81.5dB SINAD, 150mW from 5V Supplies Single Supply, 10V Input Range, Low Power sn1415 1415fs LT/TP 0497 7K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1996 300ksps 140ksps ...