LTC1272-3CCSW#TRPBF Linear Technology, LTC1272-3CCSW#TRPBF Datasheet - Page 4
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LTC1272-3CCSW#TRPBF
Manufacturer Part Number
LTC1272-3CCSW#TRPBF
Description
IC A/D CONV 12BIT SAMPLNG 24SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1272-3CCSW.pdf
(20 pages)
Specifications of LTC1272-3CCSW#TRPBF
Number Of Bits
12
Sampling Rate (per Second)
250k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
75mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
range, otherwise specifications are at T
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together, unless otherwise noted.
Note 3: When the analog input voltage is taken below ground it will be
clamped by an internal diode. This product can handle, with no external
diode, input currents of greater than 60mA below ground without latch-up.
Note 4: V
LTC1272-8, t
performance, the LTC1272 clock should be synchronized to the RD and
CS control inputs with at least 40ns separating convert start from the
nearest clock edge.
LTC1272
TI
4
1
2
3
4
5
6
7
8
9
10
11
12
13
CONV
W
I
DD
U
= 5V, f
G
r
= t
PARAMETER
CS to RD Setup Time
RD to BUSY Delay
Data Access Time After RD
RD Pulse Width
CS to RD Hold Time
Data Setup Time After BUSY
Bus Relinquish Time
HBEN to RD Setup Time
HBEN to RD Hold Time
Delay Between RD Operations
Delay Between Conversions
Aperture Delay of Sample and Hold
CLK to BUSY Delay
Conversion Time
f
C
= 5ns unless otherwise specified. For best analog
CLK
HARA TERISTICS
= 4MHz for LTC1272-3, and 1.6MHz for
C
↓
A
= 25°C. (Note 8)
The
●
denotes the specifications which apply over the full operating temperature
CONDITIONS
C
COM Grade
C
COM Grade
C
COM Grade
COM Grade
COM Grade
COM Grade
Jitter < 50ps
COM Grade
L
L
L
= 20pF
= 100pF
= 50pF
Note 5: Linearity error is specified between the actual end points of the
A/D transfer curve.
Note 6: The LTC1272 has the same 0V to 5V input range as the AD7572
but, to achieve single supply operation, it provides a 2.42V reference
output instead of the –5.25V of the AD7572. This requires that the polarity
of the reference bypass capacitor be reversed when plugging an LTC1272
into an AD7572 socket.
Note 7: Guaranteed by design, not subject to test.
Note 8: V
ensure compliance. All input control signals are specified with t
(10% to 90% of 5V) and timed from a voltage level of 1.6V. See Figures 13
through 17.
DD
= 5V. Timing specifications are sample tested at 25°C to
●
●
●
●
●
●
●
●
●
●
●
●
●
200
20
20
12
MIN
t
t
0
0
0
0
1
3
3
LTC1272-XA/C
TYP
80
50
70
40
30
25
80
MAX
190
230
110
125
150
170
220
90
70
90
75
85
13
r
= t
CYCLES
f
UNITS
= 5ns
1272fb
1272fb
1272fb
CLK
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns