LTC1419AISW Linear Technology, LTC1419AISW Datasheet - Page 16

• Manufacturer Part Number: LTC1419AISW
• Description: IC A/D CONV 14BIT SAMPLNG 28SOIC
• Manufacturer: Linear Technology

Specifications of LTC1419AISW

• Number Of Bits: 14
• Sampling Rate (per Second): 800k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 240mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS
LTC1419
16
DIGITAL INTERFACE
The A/D converter is designed to interface with micropro-
cessors as a memory mapped device. The CS and RD
control inputs are common to all peripheral memory
interfacing. A separate CONVST is used to initiate a
conversion.
Internal Clock
The A/D converter has an internal clock that eliminates the
need of synchronization between the external clock and
the CS and RD signals found in other ADCs. The internal
clock is factory trimmed to achieve a typical conversion
time of 0.95µs and a maximum conversion time over the
full operating temperature range of 1.15µs. No external
adjustments are required. The guaranteed maximum
acquisition time is 300ns. In addition, a throughput time of
1.25µs and a minimum sampling rate of 800ksps are
guaranteed.
Power Shutdown
The LTC1419 provides two power shutdown modes, nap
and sleep, to save power during inactive periods. The nap
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INFORMATION
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Figure 13d. Suggested Evaluation Circuit Board—Solder Side Layout
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mode reduces the power by 95% and leaves only the
digital logic and reference powered up. The wake-up time
from nap to active is 400ns. In sleep mode, the reference
is shut down and only a small current remains, about
250µA. Wake-up time from sleep mode is much slower
since the reference circuit must power up and settle to
0.005% for full 14-bit accuracy. Sleep mode wake-up
time is dependent on the value of the capacitor connected
to the REFCOMP (Pin 4). The wake-up time is 10ms with
the recommended 10µF capacitor. Shutdown is con-
trolled by Pin 21 (SHDN); the ADC is in shutdown when it
is low. The shutdown mode is selected with Pin 20 (CS);
low selects nap.
SHDN
Figure 14a. CS to SHDN Timing
CS
t
3
1419 F14a
1419fb