AD9225ARSZ Analog Devices Inc, AD9225ARSZ Datasheet - Page 12

IC ADC 12BIT 25MSPS 28-SSOP

AD9225ARSZ

Manufacturer Part Number
AD9225ARSZ
Description
IC ADC 12BIT 25MSPS 28-SSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9225ARSZ

Data Interface
Parallel
Number Of Bits
12
Sampling Rate (per Second)
25M
Number Of Converters
7
Power Dissipation (max)
373mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.200", 5.30mm Width)
Resolution (bits)
12bit
Sampling Rate
25MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
4.75V To 5.25V
Supply Current
65mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9225-EB - BOARD EVAL FOR AD9225
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD9225
Differential modes of operation (ac-coupled or dc-coupled input)
provide the best THD and SFDR performance over a wide fre-
quency range. Differential operation should be considered for the
most demanding spectral based applications (e.g., direct IF-to-
digital conversion). See Figures 12 and 13 and the Differential
Mode of Operation section. Differential input characterization was
performed for this data sheet using the configuration shown in
Figure 13.
Single-ended operation requires that VINA be ac-coupled or dc-
coupled to the input signal source while VINB of the AD9225 be
biased to the appropriate voltage corresponding to a midscale code
transition. Note that signal inversion may be easily accomplished
by transposing VINA and VINB. Most of the single-ended specifi-
cations for the AD9225 are characterized using Figure 21 circuitry
with input spans of 4 V and 2 V as well as VINB = 2.5 V.
Differential operation requires that VINA and VINB be simulta-
neously driven with two equal signals that are in and out of phase
versions of the input signal. Differential operation of the AD9225
offers the following benefits: (1) Signal swings are smaller and,
therefore, linearity requirements placed on the input signal source
may be easier to achieve, (2) Signal swings are smaller and there-
fore may allow the use of op amps which may otherwise have been
constrained by headroom limitations, (3) Differential operation
minimizes even-order harmonic products, and (4) Differential
operation offers noise immunity based on the device’s common-
mode rejection.
As is typical of most IC devices, exceeding the supply limits will
turn on internal parasitic diodes resulting in transient currents
within the device. Figure 7 shows a simple means of clamping an
ac-coupled or dc-coupled single-ended input with the addition of
two series resistors and two diodes. An optional capacitor is shown
for ac-coupled applications. Note that a larger series resistor could
be used to limit the fault current through D1 and D2 but should
be evaluated since it can cause a degradation in overall perfor-
mance. A similar clamping circuit could also be used for each input
if a differential input signal is being applied. The diodes might
cause nonlinearities in the signal. Careful evaluation should be
performed on the diodes used.
SINGLE-ENDED MODE OF OPERATION
The AD9225 can be configured for single-ended operation using
dc-coupling or ac-coupling. In either case, the input of the ADC
must be driven from an operational amplifier that will not degrade
the ADC’s performance. Because the ADC operates from a single
supply, it will be necessary to level shift ground based bipolar
signals to comply with its input requirements. Both dc and ac
coupling provide this necessary function, but each method results
in different interface issues that may influence the system design
and performance.
V
V
CC
EE
Figure 7. Simple Clamping Circuit
OPTIONAL
AC COUPLING
CAPACITOR
30
R
S1
AVDD
D2
1N4148
D1
1N4148
20
R
S2
AD9225
–12–
Single-ended operation is often limited by the availability of driving
op amps. Very low distortion op amps that provide great perfor-
mance out to the Nyquist frequency of the converter are hard to
find. Compounding the problem, for dc-coupled, single-ended
applications, is the inability of many high performance amplifiers
to maintain low distortions as their outputs approach their positive
output voltage limit (i.e., 1 dB compression point). For this reason,
it is recommended that applications requiring high performance
dc coupling use the single-ended-to-differential circuit shown in
Figure 12.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc-coupled
to the AD9225. An operational amplifier can be configured to
rescale and level shift the input signal so that it is compatible with
the selected input range of the ADC. The input range to the ADC
should be selected on the basis of system performance objectives,
as well as the analog power supply availability since this will place
certain constraints on the op amp selection.
Many of the new high performance op amps are specified for only
±5 V operation and have limited input/output swing capabilities.
The selected input range of the AD9225 should be considered with
the headroom requirements of the particular op amp to prevent
clipping of the signal. Since the output of a dual supply amplifier
can swing below –0.3 V, clamping its output should be considered
in some applications.
In some applications, it may be advantageous to use an op amp
specified for single-supply +5 V operation since it will inherently
limit its output swing to within the power supply rails. Amplifiers
like the AD8041 and AD8011 are useful for this purpose but their
low bandwidths will limit the AD9225’s performance. High perfor-
mance amplifiers, such as the AD9631, AD9632, AD8056, or
AD8055, allow the AD9225 to be configured for larger input spans
which will improve the ADC’s noise performance.
Op amp circuits using a noninverting and inverting topology are
discussed in the next section. Although not shown, the non-
inverting and inverting topologies can be easily configured as part
of an antialiasing filter by using a Sallen-Key or multiple-feedback
topology. An additional R-C network can be inserted between the
op amp output and the AD9225 input to provide a filter pole.
Simple Op Amp Buffer
In the simplest case, the input signal to the AD9225 will already be
biased at levels in accordance with the selected input range. It is
simply necessary to provide an adequately low source impedance
for the VINA and VINB analog pins of the ADC. Figure 8 shows
the recommended configuration a single-ended drive using an op
amp. In this case, the op amp is shown in a noninverting unity gain
configuration driving the VINA pin. The internal reference drives
the VINB pin. Note that the addition of a small series resistor of
30 W to 50 W connected to VINA and VINB will be beneficial in
nearly all cases. Refer to the Analog Input Operation section on a
discussion on resistor selection. Figure 8 shows the proper connec-
tion for a 0 V to 4 V input range. Alternative single-ended ranges
of 0 V to 2 ¥ VREF can also be realized with the proper configura-
tion of VREF (refer to the Using the Internal Reference section).
Headroom limitations of the op amp must always be considered.
Rev. C

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