LTC1291DCN8 Linear Technology, LTC1291DCN8 Datasheet - Page 7
![IC DATA ACQ SYSTEM 12BIT 8-DIP](/photos/6/59/65955/161-8-dip_sml.jpg)
LTC1291DCN8
Manufacturer Part Number
LTC1291DCN8
Description
IC DATA ACQ SYSTEM 12BIT 8-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet
1.LTC1291DCN8PBF.pdf
(20 pages)
Specifications of LTC1291DCN8
Resolution (bits)
12 b
Data Interface
Serial, Parallel
Voltage Supply Source
Single Supply
Voltage - Supply
5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Sampling Rate (per Second)
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1291DCN8
Manufacturer:
LT
Quantity:
5 510
Company:
Part Number:
LTC1291DCN8
Manufacturer:
XILI
Quantity:
5 510
The LTC1291 is a data acquisition component which
contains the following functional blocks:
1. 12-bit successive approximation capacitive A/D
2. Analog multiplexer (MUX)
3. Sample-and-hold (S/H)
4. Synchronous, half duplex serial interface
5. Control and timing logic
DIGITAL CONSIDERATIONS
Serial Interface
The LTC1291 communicates with microprocessors and
other external circuitry via a synchronous, half duplex,
4-wire serial interface (see Operating Sequence). The
clock (CLK) synchronizes the data transfer with each bit
A
TEST CIRCUITS
PPLICATI
converter
D
OUT
Voltage Waveforms for D
t
r
D
CLK
OUT
D
CS
IN
O
U
S
I FOR ATIO
OUT
START
U
Rise and Fall Times, t
1
W
2
t
f
Voltage Waveforms for t
U
1291 TC04
r
, t
2.4V
0.4V
f
3
being transmitted on the falling CLK edge and captured on
the rising CLK edge in both transmitting and receiving
systems.
The input data is first received and then the A/D conversion
result is transmitted (half duplex). Because of the half
duplex operation D
allowing transmission over just 3 wires: CS, CLK and
ADDRESS IN
CS
SHIFT MUX
4
D
CLK
OUT
D
IN
en
Voltage Waveforms for D
1
1 NULL
BIT
5
SHIFT A/D CONVERSION
RESULT OUT
D
OUT
0.8V
t
dDO
1
IN
0.8V
t
en
and D
Figure 1
OUT
OUT
D
IN
2
B11
Delay Time, t
may be tied together
1291 TC07
D
OUT
LTC1291
2
1291 TC03
dDO
2.4V
0.4V
1291 F01
1291fa
7