AD5172BRMZ50 Analog Devices Inc, AD5172BRMZ50 Datasheet - Page 5

IC DGTL POT DUAL 50K 10-MSOP

AD5172BRMZ50

Manufacturer Part Number
AD5172BRMZ50
Description
IC DGTL POT DUAL 50K 10-MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5172BRMZ50

Memory Type
Non-Volatile
Temperature Coefficient
35 ppm/°C Typical
Taps
256
Resistance (ohms)
50K
Number Of Circuits
2
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Resistance In Ohms
50K
End To End Resistance
50kohm
Resistance Tolerance
± 20%
No. Of Steps
256
Control Interface
Serial, I2C, 2-Wire
No. Of Pots
Dual
Supply Voltage Range
2.7V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Parameter
POWER SUPPLIES
DYNAMIC CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Typical specifications represent average readings at 25°C and V
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
V
Specifications apply to all VRs.
INL and DNL are measured at V
of ±1 LSB maximum are guaranteed monotonic operating conditions.
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
Guaranteed by design, but not subject to production test.
Measured at Terminal A. Terminal A is open circuited in shutdown mode.
The minimum voltage requirement on the V
However, care must be taken to ensure that the minimum V
Different from the operating power supply; the power supply for OTP is used one time only.
Different from the operating current; the supply current for OTP lasts approximately 400 ms for one time only.
See Figure 30 for an energy plot during an OTP program.
P
All dynamic characteristics use V
A
Power Supply Range
OTP Supply Voltage
Supply Current
OTP Supply Current
Power Dissipation
Power Supply Sensitivity
Bandwidth, −3 dB
Total Harmonic Distortion
V
Resistor Noise Voltage Density
DISS
= V
W
Settling Time
is calculated from (I
DD
, V
B
= 0 V, wiper (V
13
DD
9, 10
9, 11, 12
W
) = no connect.
× V
DD
W
). CMOS logic level inputs result in minimum power dissipation.
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
DD
14
= 5 V.
IH
is 0.7 V × V
DD
. For example, V
IH
is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors.
DD
Symbol
V
V
I
I
P
PSS
BW
THD
t
e
DD
DD_OTP
S
DD_RANGE
DD_OTP
DISS
N_WB
= 5 V.
W
IH
minimum = 3.5 V when V
Rev. H | Page 5 of 24
Conditions
T
V
V
V
V
V
code = midscale
R
R
R
V
f = 1 kHz, R
V
error band
R
A
AB
AB
AB
WB
IH
DD_OTP
IH
DD
DD
A
A
= 25°C
= 1 V rms, V
= 5 V, V
= 5 V or V
= 5 V or V
= 10 kΩ, code = 0x80
= 50 kΩ, code = 0x80
= 100 kΩ, code = 0x80
= 5 V
= 5 V ± 10%,
= 5 kΩ, R
= 5.0 V, T
B
DD
AB
= 0 V, ±1 LSB
= 5 V. It is typical for the SCL and SDA resistors to be pulled up to V
IL
IL
S
= 10 kΩ
= 0 Ω
= 0 V
= 0 V,
B
= 0 V,
A
= 25°C
Min
2.7
5.6
A
= V
DD
and V
Typ
5.7
3.5
100
±0.02
600
100
40
0.1
2
9
B
1
= 0 V. DNL specification limits
AD5172/AD5173
Max
5.5
5.8
6
33
±0.08
Unit
V
μA
mA
μW
kHz
kHz
μs
nV/√Hz
V
%/%
kHz
%
DD
.

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