MAX5419LETA+T Maxim Integrated Products, MAX5419LETA+T Datasheet - Page 12
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MAX5419LETA+T
Manufacturer Part Number
MAX5419LETA+T
Description
IC POT DGTL 256-TAP I2C 8-TDFN
Manufacturer
Maxim Integrated Products
Specifications of MAX5419LETA+T
Package / Case
8-TDFN Exposed Pad
Mounting Type
Surface Mount
Voltage - Supply
2.7 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Temperature Coefficient
35 ppm/°C Typical
Interface
I²C, 2-Wire Serial
Resistance In Ohms
200K
Number Of Circuits
1
Memory Type
Non-Volatile
Taps
256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
256-Tap, Nonvolatile, I
Digital Potentiometers
The internal EEPROM consists of an 8-bit nonvolatile
register that retains the value written to it before the
device is powered down. The nonvolatile register is
programmed with the midscale value at the factory.
Upon power-up, the MAX5417/MAX5418/MAX5419
load the data stored in the nonvolatile memory register
into the volatile memory register, updating the wiper
position with the data stored in the nonvolatile memory
register. This initialization period takes 10µs.
The MAX5417/MAX5418/MAX5419 feature a low-power
standby. When the device is not being programmed, it
goes into standby mode and power consumption is
typically 500nA.
The MAX5417/MAX5418/MAX5419 are intended for cir-
cuits requiring digitally controlled adjustable resis-
tance, such as LCD contrast control (where voltage
biasing adjusts the display contrast), or for programma-
ble filters with adjustable gain and/or cutoff frequency.
Table 2. Command Byte Summary
Figure 9. Positive LCD Bias Control Using a Voltage-Divider
12
NVREGxVREG
VREGxNVREG
SCL CYCLE
NUMBER
NVREG
VREG
______________________________________________________________________________________
MAX5417
MAX5418
MAx5419
S
Applications Information
A6 A5 A4 A3 A2 A1 A0
1
0
0
0
0
5V
2
1
1
1
1
H
L
ADDRESS BYTE
3
0
0
0
0
W
4
1
1
1
1
A2 A1 A0
A2 A1 A0
A2 A1 A0
A2 A1 A0
5
Nonvolatile Memory
6
30V
7
8
0
0
0
0
ACK
9
Power-Up
Standby
10
0
0
0
0
V
OUT
TX
11
0
0
1
1
NV
12
0
1
1
0
CONTROL BYTE
2
13
V
1
0
0
1
C-Interface,
14
R3
0
0
0
0
Figures 9 and 10 show an application where the volt-
age-divider or variable resistor is used to make an
adjustable, positive LCD bias voltage. The op amp pro-
vides buffering and gain to the resistor-divider network
made by the potentiometer (Figure 9) or to a fixed
resistor and a variable resistor (see Figure 10).
Figure 11 shows the configuration for a 1st-order pro-
grammable filter. The gain of the filter is adjusted by
R2, and the cutoff frequency is adjusted by R3. Use the
following equations to calculate the gain (G) and the
3dB cutoff frequency (f
Figure 10. Positive LCD Bias Control Using a Variable Resistor
15
R2
0
0
0
0
R1
16
0
0
0
0
R0
17
1
1
1
1
MAX5417
MAX5418
MAX5419
ACK
18
D7
D7
D7
D7
D7
19
f
G
C
H
L
D6
D6
D6
D6
D6
20
5V
=
=
Positive LCD Bias Control
C
1
D5
D5
D5
D5
D5
21
):
2
π
W
+
DATA BYTE
×
D4
D4
D4
D4
D4
22
R
R
Programmable Filter
1
2
R
1
3
D3
D3
D3
D3
D3
23
×
D2
D2
D2
D2
D2
24
30V
C
D1
D1
D1
D1
D1
25
D0
D0
D0
D0
D0
26
V
ACK
27
OUT
P