MAX5419LETA+T Maxim Integrated Products, MAX5419LETA+T Datasheet - Page 11

IC POT DGTL 256-TAP I2C 8-TDFN

MAX5419LETA+T

Manufacturer Part Number
MAX5419LETA+T
Description
IC POT DGTL 256-TAP I2C 8-TDFN
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX5419LETA+T

Package / Case
8-TDFN Exposed Pad
Mounting Type
Surface Mount
Voltage - Supply
2.7 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Temperature Coefficient
35 ppm/°C Typical
Interface
I²C, 2-Wire Serial
Resistance In Ohms
200K
Number Of Circuits
1
Memory Type
Non-Volatile
Taps
256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The internal EEPROM consists of an 8-bit nonvolatile
register that retains the value written to it before the
device is powered down. The nonvolatile register is
programmed with the zero-scale value at the factory.
Upon power-up, the MAX5417/MAX5418/MAX5419
load the data stored in the nonvolatile memory register
into the volatile memory register, updating the wiper
position with the data stored in the nonvolatile memory
register. This initialization period takes 10µs.
The MAX5417/MAX5418/MAX5419 feature a low-power
standby. When the device is not being programmed, it
goes into standby mode and power consumption is
typically 500nA.
The MAX5417/MAX5418/MAX5419 are intended for cir-
cuits requiring digitally controlled adjustable resis-
tance, such as LCD contrast control (where voltage
biasing adjusts the display contrast), or for programma-
ble filters with adjustable gain and/or cutoff frequency.
Table 2. Command Byte Summary
Figure 9. Positive LCD Bias Control Using a Voltage-Divider
NVxVREG
VxNVREG
NUMBER
CYCLE
NVREG
VREG
SCL
MAX5417
MAX5418
MAX5419
START
A6
1
0
0
0
0
Applications Information
A5
2
1
1
1
1
______________________________________________________________________________________
5V
H
L
A4
ADDRESS BYTE
3
0
0
0
0
W
A3
4
1
1
1
1
A2
A2
A2
A2
A2
5
Nonvolatile Memory
256-Tap, Nonvolatile, I
A1
A1
A1
A1
A1
6
A0
A0
A0
A0
A0
30V
7
8
0
0
0
0
ACK
9
Power-Up
Standby
10
0
0
0
0
V
OUT
TX
11
0
0
1
1
NV
12
0
1
1
0
CONTROL BYTE
13
V
1
0
0
1
14
R3
0
0
0
0
Figures 9 and 10 show an application where the volt-
age-divider or variable resistor is used to make an
adjustable, positive LCD bias voltage. The op amp pro-
vides buffering and gain to the resistor-divider network
made by the potentiometer (Figure 9) or to a fixed
resistor and a variable resistor (see Figure 10).
Figure 11 shows the configuration for a 1st-order pro-
grammable filter. The gain of the filter is adjusted by
R2, and the cutoff frequency is adjusted by R3. Use the
following equations to calculate the gain (G) and the
3dB cutoff frequency (f
Figure 10. Positive LCD Bias Control Using a Variable Resistor
Digital Potentiometers
15
R2
0
0
0
0
R1
16
0
0
0
0
17
R0
1
1
1
1
MAX5417
MAX5418
MAX5419
ACK
18
19
D7
D7
D7
D7
D7
f
G
C
H
L
D6
D6
D6
D6
D6
20
5V
=
=
Positive LCD Bias Control
C
1
D5
D5
D5
D5
D5
2
21
2
):
π
W
+
C-Interface,
DATA BYTE
×
D4
D4
D4
D4
D4
22
R
R
Programmable Filter
1
2
R
1
3
D3
D3
D3
D3
D3
23
×
D2
D2
D2
D2
D2
30V
24
C
25
D1
D1
D1
D1
D1
D0
D0
D0
D0
D0
26
V
ACK
OUT
27
STOP
11

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