MCIMX-LVDS1 Freescale Semiconductor, MCIMX-LVDS1 Datasheet - Page 112

• Manufacturer Part Number: MCIMX-LVDS1
• Description: MCIMX-LVDS1
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MCIMX-LVDS1

• Rohs Compliant: YES
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DDRQ_1.5V
R26
470
R27
470
C79
0.1UF
C86
0.1UF
C106
0.1UF
C125
0.1UF
C73
0.1UF
C74
0.1UF
C80
0.01UF
C87
0.1UF
C107
0.01UF
C126
0.1UF
DDR_VREF
DDR_VREF
U2J
i.MX53 - DDR
C81
0.1UF
C88
0.1UF
C108
0.1UF
C127
0.1UF
DRAM_CALIBRATION
C82
0.01UF
C89
0.1UF
C109
0.01UF
C128
0.1UF
DRAM_SDCLK_0_B
DRAM_SDCLK_1_B
DRAM_SDQS0_B
DRAM_SDQS1_B
DRAM_SDQS2_B
DRAM_SDQS3_B
DRAM_SDCLK_0
DRAM_SDCLK_1
DRAM_SDCKE0
DRAM_SDCKE1
DRAM_SDODT0
DRAM_SDODT1
DRAM_SDQS0
DRAM_SDQS1
DRAM_SDQS2
DRAM_SDQS3
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_SDWE
DRAM_RESET
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
DRAM_RAS
DRAM_CAS
DRAM_CS0
DRAM_CS1
DRAM_D10
DRAM_D11
DRAM_D12
DRAM_D13
DRAM_D14
DRAM_D15
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_D24
DRAM_D25
DRAM_D26
DRAM_D27
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D31
DDR_VREF
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A14
DRAM_A15
DRAM_D0
DRAM_D1
DRAM_D2
DRAM_D3
DRAM_D4
DRAM_D5
DRAM_D6
DRAM_D7
DRAM_D8
DRAM_D9
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
C83
0.1UF
C90
0.1UF
C110
0.1UF
C129
0.1UF
DDRQ_1.5V
DDRQ_1.5V
M19
L21
M20
N20
K20
N21
M22
N22
N23
M21
K19
L22
L20
L23
N18
M18
R19
P20
N19
J19
L18
L19
H19
T19
J18
R18
P18
M23
K23
K22
P22
P23
H23
H22
D23
D22
T22
T23
Y 22
Y 23
H21
E20
T20
W20
K18
P19
H20
G21
J21
G20
J23
G23
J22
G22
E21
D21
E22
D20
E23
C23
F23
C22
U20
T21
U21
R21
U23
R22
U22
R23
Y 20
W21
Y 21
W22
AA23
V23
AA22
W23
L17
C84
0.01UF
C91
10UF
C111
0.01UF
C130
10UF
DDR_1.5V
DDR_1.5V
DRAM_RESET
DRAM_CAL_MX53
DRAM_CLK0
DRAM_CLK0#
DRAM_CLK1
DRAM_CLK1#
DRAM_SDQS0
DRAM_SDQS0_B
DRAM_SDQS1
DRAM_SDQS1_B
DRAM_SDQS2
DRAM_SDQS2_B
DRAM_SDQS3
DRAM_SDQS3_B
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
DRAM_CS0
DRAM_CS1
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
EIM_SDBA0
EIM_SDBA1
EIM_SDBA2
DRAM_RAS
DRAM_CAS
DRAM_SDWE
DRAM_SDCKE0
DRAM_SDCKE1
EIM_SDODT0
EIM_SDODT1
DRAM_D0
DRAM_D1
DRAM_D2
DRAM_D3
DRAM_D4
DRAM_D5
DRAM_D6
DRAM_D7
DRAM_D8
DRAM_D9
DRAM_D10
DRAM_D11
DRAM_D12
DRAM_D13
DRAM_D14
DRAM_D15
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_D24
DRAM_D25
DRAM_D26
DRAM_D27
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D31
C85
10UF
C112
10UF
0
0
0
0
DRAM_D[15..0]
DRAM_D[31..16]
DDR_VREF
USE: ELPIDA EDJ2116DASE-DJ-F or MICRON MT41J128M16HA-15E
R30
R31
R32
R33
DRAM_SDCLK_0
DRAM_SDCLK_0_B
DRAM_SDCLK_1
DRAM_SDCLK_1_B
DRAM_SDCLK_0_B
DRAM_SDCLK_1_B
DRAM_SDCLK_0
DRAM_SDCLK_1
R190
240
R28
200
R29
200
C92
0.1UF
C113
0.1UF
R193
240
C93
0.01UF
C114
0.1UF
DDR_VREF
R191
240
DDR_VREF
DRAM_A[13..0]
0.1UF
0.1UF
C76
C77
C94
0.1UF
C115
0.1UF
DRAM_SDCLK_0
DRAM_SDCLK_0_B
DRAM_SDCKE0
DRAM_RESET
DRAM_CAL_DDRA
DRAM_CS0
DRAM_RAS
DRAM_CAS
DRAM_SDWE
DRAM_SDCLK_1
DRAM_SDCLK_1_B
DRAM_SDCKE0
DRAM_RESET
DRAM_CAL_DDRC
DRAM_CS0
DRAM_RAS
DRAM_CAS
DRAM_SDWE
DRAM_DQM0
DRAM_DQM1
EIM_SDODT0
DRAM_DQM2
DRAM_DQM3
EIM_SDODT0
EIM_SDBA0
EIM_SDBA1
EIM_SDBA2
EIM_SDBA0
EIM_SDBA1
EIM_SDBA2
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
C95
0.01UF
C116
0.1UF
N3
P7
P3
N2
P8
P2
R8
R2
R3
R7
N7
M2
N8
M3
K3
K7
K9
K1
M8
H1
E7
D3
N3
P7
P3
N2
P8
P2
R8
R2
R3
R7
N7
M2
N8
M3
K3
K7
K9
K1
M8
H1
E7
D3
C96
0.1UF
C117
0.1UF
T8
L7
T3
L2
J3
L3
J7
T2
L8
T8
L7
T3
L2
J3
L3
J7
T2
L8
DDRQ_1.5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
BA0
BA1
BA2
CS
RAS
CAS
WE
CK
CK
CKE
RESET
ZQ
ODT
VREFCA
VREFDQ
LDM
UDM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
BA0
BA1
BA2
CS
RAS
CAS
WE
CK
CK
CKE
RESET
ZQ
ODT
VREFCA
VREFDQ
LDM
UDM
C97
0.01UF
C118
10UF
DDR_1.5V
DDR_1.5V
DDR_1.5V
2G_DDR3_SDRAM_128MX16
2G_DDR3_SDRAM_128MX16
C98
10UF
DDRQ_1.5V
DDRQ_1.5V
C99
0.1UF
C119
0.1UF
C100
0.01UF
C120
0.1UF
C101
0.1UF
C121
0.1UF
NC_J1
NC_J9
NC_L1
NC_L9
NC_M7
NC_T7
NC_J1
NC_J9
NC_L1
NC_L9
NC_M7
NC_T7
UDQS
UDQS
UDQS
UDQS
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
MT41J128M16HA-15E
MT41J128M16HA-15E
U3
U5
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
F3
G3
C7
B7
J1
J9
L1
L9
M7
T7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
F3
G3
C7
B7
J1
J9
L1
L9
M7
T7
C102
0.01UF
C122
0.1UF
DRAM_SDQS0
DRAM_SDQS0_B
DRAM_SDQS1
DRAM_SDQS1_B
DRAM_SDQS2
DRAM_SDQS2_B
DRAM_SDQS3
DRAM_SDQS3_B
DRAM_D0
DRAM_D1
DRAM_D4
DRAM_D3
DRAM_D6
DRAM_D5
DRAM_D2
DRAM_D7
DRAM_D13
DRAM_D12
DRAM_D9
DRAM_D10
DRAM_D15
DRAM_D14
DRAM_D11
DRAM_D8
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_D31
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D27
DRAM_D24
DRAM_D25
DRAM_D26
C103
0.1UF
C123
0.1UF
DDRQ_1.5V
C104
0.01UF
C124
10UF
DDR_1.5V
DRAM_D[15..0]
DRAM_D[31..16]
R194
240
C105
10UF
R192
240
DDR_VREF
DDR_VREF
0.1UF
0.1UF
C75
C78
NOTE:
DDR data pins can be
swapped for improved
routing according to the
following rules:
1)
within each byte
2)
swapped
3)
follow each byte
When swapping bytes 0 or 1
into 2 or 3, must then use
32 bit access.
16-bit access.
DRAM_SDCLK_0
DRAM_SDCLK_0_B
DRAM_SDCKE1
DRAM_RESET
DRAM_CAL_DDRB
DRAM_CS1
DRAM_RAS
DRAM_CAS
DRAM_SDWE
DRAM_SDCLK_1
DRAM_SDCLK_1_B
DRAM_SDCKE1
DRAM_RESET
DRAM_CAL_DDRD
Data pins can be swapped
Data bytes can be
DQMx and DQSx must
DRAM_CS1
EIM_SDODT1
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
DRAM_RAS
DRAM_CAS
DRAM_SDWE
EIM_SDODT1
EIM_SDBA0
EIM_SDBA1
EIM_SDBA2
EIM_SDBA0
EIM_SDBA1
EIM_SDBA2
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
N3
P7
P3
N2
P8
P2
R8
R2
R3
R7
N7
M2
N8
M3
K3
K7
K9
K1
M8
H1
E7
D3
N3
P7
P3
N2
P8
P2
R8
R2
R3
R7
N7
M2
N8
M3
K3
K7
K9
K1
M8
H1
E7
D3
Cannot use
T8
L7
T3
L2
J3
L3
J7
T2
L8
T8
L7
T3
L2
J3
L3
J7
T2
L8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
BA0
BA1
BA2
CS
RAS
CAS
WE
CK
CK
CKE
RESET
ZQ
ODT
VREFCA
VREFDQ
LDM
UDM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
BA0
BA1
BA2
CS
RAS
CAS
WE
CK
CK
CKE
RESET
ZQ
ODT
VREFCA
VREFDQ
LDM
UDM
DDR_1.5V
DDR_1.5V
2G_DDR3_SDR AM_128MX16
2G_DDR3_SDR AM_128MX16
DDRQ_1.5V
DDRQ_1.5V
ICAP Classif ication:
Drawing Title:
Page Title:
Size
C
Date:
Document Number
Tuesday , February 01, 2011
MCIMX53-QUICKSTART
MX53 DDR3
FCP:
NC_J1
NC_J9
NC_L1
NC_L9
NC_M7
NC_T7
NC_J1
NC_J9
NC_L1
NC_L9
NC_M7
NC_T7
UDQS
UDQS
UDQS
UDQS
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
SOURCE:SCH-26565 PDF:SPF-26565
___
MT41J128M16HA-15E
MT41J128M16HA-15E
U4
U6
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
F3
G3
C7
B7
J1
J9
L1
L9
M7
T7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
F3
G3
C7
B7
J1
J9
L1
L9
M7
T7
DRAM_SDQS0
DRAM_SDQS0_B
DRAM_SDQS1
DRAM_SDQS1_B
DRAM_SDQS2
DRAM_SDQS2_B
DRAM_SDQS3
DRAM_SDQS3_B
FIUO:
DRAM_D1
DRAM_D0
DRAM_D3
DRAM_D4
DRAM_D7
DRAM_D2
DRAM_D5
DRAM_D6
DRAM_D12
DRAM_D13
DRAM_D10
DRAM_D9
DRAM_D8
DRAM_D11
DRAM_D14
DRAM_D15
DRAM_D17
DRAM_D16
DRAM_D19
DRAM_D18
DRAM_D23
DRAM_D22
DRAM_D21
DRAM_D20
DRAM_D28
DRAM_D31
DRAM_D30
DRAM_D29
DRAM_D26
DRAM_D25
DRAM_D24
DRAM_D27
Sheet
X
PUBI:
5
DRAM_D[15..0]
DRAM_D[31..16]
___
of
15
Rev
C