PIC16LF1847-E/MV Microchip Technology, PIC16LF1847-E/MV Datasheet - Page 96

• Manufacturer Part Number: PIC16LF1847-E/MV
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847-E/MV

• Processor Series: PIC16LF
• Core: RISC
• Data Bus Width: 10 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 1024 B
• Interface Type: SPI, I2C
• Maximum Clock Frequency: 32 KHZ
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-28
• Operating Temperature Range: - 40 C to + 125 C
• Processor To Be Evaluated: PIC16F1847
• Supply Current (max): 34 uA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC16(L)F1847
8.5.8
The PIR3 register contains the interrupt flag bits, as
shown in
REGISTER 8-8:
DS41453B-page 96
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Register
PIR3 REGISTER
Unimplemented: Read as ‘0’
CCP4IF: CCP4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP3IF: CCP3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
8-8.
U-0
—
PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CCP4IF
R/W-0/0
CCP3IF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
TMR6IF
Note 1: Interrupt flag bits are set when an inter-
rupt condition occurs, regardless of the
state of its corresponding enable bit or
the Global Enable bit, GIE of the INTCON
register. User software should ensure the
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
U-0
—
 2011 Microchip Technology Inc.
R/W-0/0
TMR4IF
U-0
—
bit 0