MAX5484EUD+T Maxim Integrated Products, MAX5484EUD+T Datasheet - Page 10
![IC POT DGTL 10BIT NV 14-TSSOP](/photos/6/57/65725/406-14-tssop_sml.jpg)
MAX5484EUD+T
Manufacturer Part Number
MAX5484EUD+T
Description
IC POT DGTL 10BIT NV 14-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5481EUD.pdf
(20 pages)
Specifications of MAX5484EUD+T
Taps
1024
Resistance (ohms)
50K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Non-Volatile
Interface
SPI, 3-Wire Serial, Up/Down
Voltage - Supply
2.7 V ~ 5.25 V, ±2.5 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10-Bit, Nonvolatile, Linear-Taper Digital
Potentiometers
(MAX5483/MAX5484 Variable Resistors)
10
4–7, 15
TQFN
8, 16
10
11
12
13
14
—
______________________________________________________________________________________
1
2
3
9
PIN
7, 8, 9, 13
TSSOP
12
11
10
14
—
6
5
4
3
2
1
SCLK(INC) Wiper Increment Control Input (SPI/UD = 0). With CS low, the wiper position moves in the
DIN(U/D)
SPI/UD
NAME
D.N.C.
GND
N.C.
V
V
CS
EP
W
L
DD
SS
No Connection. Not internally connected.
Do Not Connect. Leave unconnected for proper operation.
Wiper Terminal
Low Terminal
Negative Power-Supply Input. For single-supply operation, connect V
supply operation, -2.5V ≤ V
with a 0.1µF ceramic capacitor as close to the device as possible.
Interface-Mode Select. Select serial SPI interface when SPI/UD = 1. Select serial up/down
interface when SPI/UD = 0.
Serial SPI Interface Data Input (SPI/UD = 1)
Up/Down Control Input (SPI/UD = 0). With DIN(U/D) low, a high-to-low SCLK(INC) transition
decrements the wiper position. With DIN(U/D) high, a high-to-low SCLK(INC) transition
increments the wiper position.
Serial SPI Interface Clock Input (SPI/UD = 1)
direction determined by the state of DIN(U/D) on a high-to-low transition.
Active-Low Digital Input Chip Select
Ground
Positive Power-Supply Input (+2.7V ≤ V
ceramic capacitor as close to the device as possible.
Exposed Pad (TQFN Only). Externally connect EP to V
SS
≤ -0.2V as long as (V
DD
FUNCTION
Pin Description (continued)
≤ +5.25V). Bypass V
DD
SS
- V
SS
or leave unconnected.
) ≤ 5.25V. Bypass V
DD
to GND with a 0.1µF
SS
to GND. For dual-
SS
to GND