CAT5251YI-50-T2 ON Semiconductor, CAT5251YI-50-T2 Datasheet - Page 8

• Manufacturer Part Number: CAT5251YI-50-T2
• Description: IC POT DPP 50K 256TAP 24TSSOP
• Manufacturer: ON Semiconductor

Specifications of CAT5251YI-50-T2

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI Serial
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resistance In Ohms: 50K
• Number Of Elements: 4
• # Of Taps: 256
• Resistance (max): 50KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (SPI)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 6V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Instruction and Register Description
Device Type / Address Byte
master/processor is called the Device Address Byte. The
most significant four bits of the Device Type address are a
device type identifier. These bits for the CAT5251 are fixed
at 0101[B] (refer to Figure 4).
− A0, are the internal slave address and must match the
physical device address which is defined by the state of the
A1 − A0 input pins for the CAT5251 to successfully continue
the command sequence. Only the device which slave
address matches the incoming device address sent by the
master executes the instruction. The A1 − A0 inputs can be
actively driven by CMOS input signals or tied to V
V
be set to 0.
SS
The first byte sent to the CAT5251 from the
The two least significant bits in the slave address byte, A1
. The remaining two bits in the device address byte must
(MSB)
(MSB)
ID3
I3
0
ID2
I2
1
Device Type
Instruction
Identifier
Opcode
ID1
Figure 4. Identification Byte Format
I1
Figure 5. Instruction Byte Format
0
http://onsemi.com
CC
ID0
I0
or
1
8
Instruction Byte
instruction and register pointer information. The four most
significant bits used provide the instruction opcode I3−I0.
The R1 and R0 bits point to one of the four data registers of
each associated potentiometer. The least two significant bits
point to one of four Wiper Control Registers. The format is
shown in Figure 5.
Table 12. DATA REGISTER SELECTION
R1
0
The next byte sent to the CAT5251 contains the
Data Register
Selection
Data Register Selected
R0
0
Slave Address
DR0
DR1
DR2
DR3
WCR/Pot Selection
P1
A1
(LSB)
(LSB)
P0
A0
R1
0
0
1
1
R0
0
1
0
1