MAX5842LEUB+ Maxim Integrated Products, MAX5842LEUB+ Datasheet - Page 9

• Manufacturer Part Number: MAX5842LEUB+
• Description: IC DAC 12BIT QUAD 2WIRE 10-UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX5842LEUB+

• Settling Time: 4µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Number Of Dac Outputs: 4
• Resolution: 12 bit
• Interface Type: Serial (I2C)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 420 uA
• Voltage Reference: External
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

by a START (S) or REPEATED START (S
a STOP (P) condition. Each word transmitted over the
bus is 8 bits long and is always followed by an
acknowledge clock pulse.
The MAX5842 SDA and SCL drivers are open-drain
outputs, requiring a pullup resistor to generate a logic
high voltage (see Typical Operating Circuit). Series
resistors R
the input stages of the MAX5842 from high-voltage
spikes on the bus lines, and minimize crosstalk and
undershoot of the bus signals.
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see START and
Table 1. Power-Down Command Bits
Figure 1. 2-Wire Serial Interface Timing Diagram
COMMAND BITS
PD1
POWER-DOWN
0
0
1
1
S
are optional. These series resistors protect
SDA
SCL
t
HD, STA
PD0
START CONDITION
0
1
0
1
_______________________________________________________________________________________
Quad, 12-Bit, Low-Power, 2-Wire, Serial
Power-up device. DAC output
restored to previous value.
Power-down mode 0. Power down
device with output floating.
Power-down mode 1. Power down
device with output terminated with
1kΩ to GND.
Power-down mode 2. Power down
device with output terminated with
100kΩ to GND.
t
LOW
MODE/FUNCTION
t
R
t
t
SU, DAT
HIGH
t
F
r
) condition and
t
HD, DAT
Bit Transfer
REPEATED START CONDITION
t
SU, STA
STOP Conditions). Both SDA and SCL idle high when
the I
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by issu-
ing a START condition. A START condition is a high-to-
low transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA, while SCL is high
(Figure 2). A START condition from the master signals
the beginning of a transmission to the MAX5842. The
master terminates transmission by issuing a not
acknowledge followed by a STOP condition (see
Acknowledge Bit (ACK)). The STOP condition frees the
bus. If a repeated START condition (Sr) is generated
instead of a STOP condition, the bus remains active.
When a STOP condition or incorrect address is detect-
ed, the MAX5842 internally disconnects SCL from the
serial interface until the next START condition, minimiz-
ing digital noise and feedthrough.
The MAX5842 recognizes a STOP condition at any
point during transmission except if a STOP condition
occurs in the same high pulse as a START condition
(Figure 3). This condition is not a legal I
least one clock pulse must separate any START and
STOP conditions.
A REPEATED START (S
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation. S
master is writing to several I
want to relinquish control of the bus. The MAX5842 ser-
ial interface supports continuous write operations with
or without an S
t
HD, STA
2
C bus is not busy.
Voltage-Output DAC
r
condition separating them. Continuous
r
t
SP
may also be used when the bus
START and STOP Conditions
Repeated START Conditions
t
r
SU, STO
) condition may indicate a
CONDITION
2
STOP
C devices and does not
Early STOP Conditions
t
BUF
CONDITION
START
2
C format; at
9