MAX5501BGAP+ Maxim Integrated Products, MAX5501BGAP+ Datasheet - Page 7

• Manufacturer Part Number: MAX5501BGAP+
• Description: IC DAC V-OUT 12BIT 4CH 20-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5501BGAP+

• Settling Time: 12µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Number Of Dac Outputs: 4
• Resolution: 12 bit
• Interface Type: Serial (3-Wire)
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 640 mW
• Minimum Operating Temperature: - 40 C
• Supply Current: 0.85 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The MAX5500/MAX5501 integrate four 12-bit, voltage-
output digital-to-analog converters (DACs) that are
addressed through a simple 3-wire serial interface. The
devices include a 16-bit data-in/data-out shift register.
Each internal DAC provides a doubled-buffered input
composed of an input register and a DAC register (see
the Functional Diagram ). The negative input of each
amplifier is externally accessible.
The DACs are inverted rail-to-rail ladder networks that
convert 12-bit digital inputs into equivalent analog out-
put voltages in proportion to the applied reference volt-
age inputs. DACs A and B share the REFAB input,
while DACs C and D share the REFCD input. The two
reference inputs allow different full-scale output voltage
ranges for each pair of DACs. Figure 1 shows a simpli-
fied circuit diagram of one of the four DACs.
The two reference inputs accept positive DC and AC
signals. The voltage at each reference input sets the
full-scale output voltage for the two corresponding
DACs. The reference input voltage range is 0V to (V
- 1.4V). The output voltages (V
a digitally programmable voltage source as:
where NB is the numeric value of the binary input code
(0 to 4095) of the DAC. V
Gain is the externally set voltage gain.
The impedance at each reference input is code-depen-
dent, ranging from a low value of 10kΩ when both
DACs connected to the reference accept an input code
Figure 1. Simplified DAC Circuit Diagram
AGND
REF_
SHOWN FOR ALL 1s ON DAC
2R
V
OUT_
2R
Voltage-Output DACs with Serial Interface
D0
R
= (V
_______________________________________________________________________________________
REF
Detailed Description
2R
D9
R
x NB/4096) x Gain
REF
OUT_
is the reference voltage.
2R
D10
Reference Inputs
R
) are represented by
2R
D11
FB_
OUT_
DD
Low-Power, Quad, 12-Bit
of 555 hex, to a high value exceeding giga-ohms with
an input code of 000 hex. The load regulation of the ref-
erence source affects the performance of the devices
as the input impedance at the reference inputs is code
dependent. The REFAB and REFCD reference inputs
provide a 10kΩ guaranteed minimum input impedance.
When the same voltage source drives the two reference
inputs, the effective minimum impedance is 5kΩ. A volt-
age reference with an excellent load regulation of
0.0002mV/mA, such as the MAX6033, is capable of dri-
ving both reference inputs simultaneously at 2.5V.
Driving REFAB and REFCD separately improves refer-
ence accuracy.
The REFAB and REFCD inputs enter a high-impedance
state, with a typical input leakage current of 0.02µA,
when the MAX5500/MAX5501 are in shutdown. The ref-
erence input capacitance is also code dependent and
typically ranges from 20pF with an input code of all 0s
to 100pF with an input code of all 1s.
All DAC outputs are internally buffered by precision
amplifiers with a typical slew rate of 0.6V/µs. Access to
the inverting input of each output amplifier provides the
greater flexibility in output gain setting/signal condition-
ing (see the Applications Information section).
With a full-scale transition at the output, the typical set-
tling time to within ±0.5 LSB is 12µs when the output is
loaded with 5kΩ in parallel with 100pF. A load of less
than 2kΩ at the output degrades performance. See the
Typical Operating Characteristics for the output dynamic
responses and settling performances of the amplifiers.
The MAX5500/MAX5501 feature a software-program-
mable shutdown that reduces supply current to a typi-
cal value of 10µA. Drive PDL high to enable the
shutdown mode. Write 1100XXXXXXXXXXXX as the
input-control word to put the device in power-down
mode (Table 1).
In power-down mode, the output amplifiers and the ref-
erence inputs enter a high-impedance state.
The serial interface remains active. Data in the input
registers is retained in power-down, allowing the
devices to recall the output states prior to entering shut-
down. Start up from power-down either by recalling the
previous configuration or by updating the DACs with
new data. Allow 15µs for the outputs to stabilize when
powering up the devices or bringing the devices out of
shutdown.
Power-Down Mode
Output Amplifiers
7