MAX5190BEEG+ Maxim Integrated Products, MAX5190BEEG+ Datasheet - Page 11

IC DAC 8BIT 40MHZ VOUT 24-QSOP

MAX5190BEEG+

Manufacturer Part Number
MAX5190BEEG+
Description
IC DAC 8BIT 40MHZ VOUT 24-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5190BEEG+

Settling Time
25µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-QSOP
Number Of Dac Outputs
1
Resolution
8 bit
Interface Type
Parallel
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
- 40 C
Supply Current
4.2 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The MAX5187 output is designed to supply full-scale
output currents of 1mA into 400Ω loads in parallel with
a capacitive load of 5pF. The MAX5190 features inte-
grated 400Ω resistors that restore the array current to
proportional, differential voltages of 400mV. These dif-
ferential output voltages can then be used to drive a
balun transformer or a low-distortion, high-speed oper-
ational amplifier to convert the differential voltage into a
single-ended voltage.
Integral nonlinearity (INL) (Figure 5a) is the deviation of
the values on an actual transfer function from either a
best-straight-line fit (closest approximation to the actual
Figure 5c. Offset Error
Figure 5a. Integral Nonlinearity
8-Bit, 40MHz, Current/Voltage-Output DACs
7
6
5
4
3
2
1
0
3
2
1
0
000
000
Applications Information
ACTUAL
OFFSET
POINT
001
______________________________________________________________________________________
IDEAL OFFSET
POINT
DIAGRAM
ACTUAL
010
001
DIGITAL INPUT CODE
DIGITAL INPUT CODE
AT STEP
001 (1/4 LSB )
Performance Definitions
011
OFFSET ERROR
(+1 1/4 LSB)
100
Static and Dynamic
AT STEP
011 (1/2 LSB )
010
Integral Nonlinearity
101
IDEAL DIAGRAM
110
011
111
Outputs
transfer curve) or a line drawn between the endpoints
of the transfer function once offset and gain errors have
been nullified. For a DAC, the deviations are measured
every single step.
Differential nonlinearity (DNL) (Figure 5b) is the differ-
ence between an actual step height and the ideal value
of 1LSB. A DNL error specification of less than 1LSB
guarantees no missing codes and a monotonic transfer
function.
Offset error (Figure 5c) is the difference between the
ideal and the actual offset point. For a DAC, the offset
point is the step value when the digital input is zero.
This error affects all codes by the same amount and
can usually be compensated by trimming.
Figure 5d. Gain Error
Figure 5b. Differential Nonlinearity
7
6
5
4
0
6
5
4
3
2
1
0
000
000
IDEAL DIAGRAM
100
001
GAIN ERROR
(-1 1/4 LSB)
IDEAL FULL-SCALE OUTPUT
DIGITAL INPUT CODE
DIGITAL INPUT CODE
010
101
1 LSB
011
DIFFERENTIAL
LINEARITY ERROR (+1/4 LSB)
Differential Nonlinearity
DIFFERENTIAL LINEARITY
ERROR (-1/4 LSB)
110
100
FULL-SCALE
ACTUAL
OUTPUT
101
1 LSB
111
Offset Error
11

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