MX7837KN+ Maxim Integrated Products, MX7837KN+ Datasheet - Page 3

IC DAC 12BIT DL MULT 24-DIP

MX7837KN+

Manufacturer Part Number
MX7837KN+
Description
IC DAC 12BIT DL MULT 24-DIP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MX7837KN+

Settling Time
4µs
Number Of Bits
12
Data Interface
Parallel
Number Of Converters
2
Voltage Supply Source
Dual ±
Power Dissipation (max)
1.07W
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V
V
Note 2: The analog outputs can swing to within 2.5V of the supply rails. Hence, for good linearity towards full-scale, |V
Note 3: Static performance tested at V
Note 4: Guaranteed by design.
OUT
V
V
Positive Supply Current
Negative Supply Current
Power-Supply Rejection
Voltage-Output Settling
Time
Slew Rate
Digital-to Analog Glitch
Impulse
Channel-to-Channel Isolation
(V
V
Multiplying Feedthrough
Error
Unity-Gain Small-Signal
Bandwidth
Full-Power Bandwidth
Total Harmonic Distortion
Digital Crosstalk
Output Noise Voltage at
+25°C (0.1Hz to 10Hz)
POWER REQUIREMENTS
AC CHARACTERISTICS
DD
REFB
DD
SS
REFA
= 11.4V to 16.5V, V
connected to R
Range
Range
PARAMETER
to V
to V
be at least 2.5V lower than V
OUTA
OUTB
)
,
FB
_______________________________________________________________________________________
(MX7837), T
SS
= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, V
∆Gain/∆V
∆Gain/∆V
∆Gain/∆V
∆Gain/∆V
SYMBOL
THD
V
V
I
I
DD
SS
t
Q
DD
DD
SS
A
S
= T
and |V
DD
DD
SS
DD
SS
MIN
= +15V, V
Output unloaded
Output unloaded
V
V
V
V
Settling time to within ±1/2LSB of final DAC value;
DAC latch alternately loaded will all 0s and all 1s
DAC latch alternately loaded with 01…11 and
10…00
V
Latch Loaded with all 0s
V
with all 0s
V
with all 1s
V
all 1s
V
Code transition from all 0s to all 1s; see Typical
Operating Characteristics graphs
Amplifier noise and Johnson noise of R
SS
to T
DD
SS
DD
SS
REF
REF_
REF
REF
REF
|. Tests done with supply voltages below ±12.5V are done with V
= -15V ±5%, V
= -12V ±5%, V
MAX
= 15V ±5%, V
= 12V ±5%, V
= 20p-p, 10kHz sine wave, Alternate DAC
= 100mV
= 20V
= 6V
= 20V
SS
, unless otherwise noted.) (Note 1)
RMS
= -15V. Performance over supplies guaranteed by PSRR test.
p-p
p-p
, 1kHz, DAC latch loaded with all 1s
p-p
S
, 10kHz sine wave, latches loaded
ine wave, DAC latch loaded with
CONDITIONS
sine wave, DAC latch loaded
REF
REF
REF
REF
= -10V
= -8.9V
= 10V
= 8.9V
Complete, Dual, 12-Bit
FB
Multiplying DACs
REFA
= V
REFB
-11.4
11.4
MIN
= +10V, R
REFA
TYP
125
-95
-90
-88
60
10
5
4
4
7
1
2
REFA
L
= V
= 2kΩ, C
| and |V
REFB
±0.01
±0.01
±0.01
±0.01
-16.5
MAX
16.5
10
6
= ±8.9V.
REFB
L
= 100pF,
% per %
UNITS
µV
nV-s
MHz
nV-s
V/µs
kHz
| must
mA
mA
dB
dB
dB
µs
V
V
RMS
3

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