LTC2630ISC6-HM8#TRPBF Linear Technology, LTC2630ISC6-HM8#TRPBF Datasheet - Page 16
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LTC2630ISC6-HM8#TRPBF
Manufacturer Part Number
LTC2630ISC6-HM8#TRPBF
Description
IC DAC 8BIT R-R SC70-6
Manufacturer
Linear Technology
Datasheet
1.LTC2630CSC6-LZ8TRMPBF.pdf
(20 pages)
Specifications of LTC2630ISC6-HM8#TRPBF
Settling Time
3.2µs
Number Of Bits
8
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
480µW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SC-70-6, SC-88, SOT-363
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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OPERATION
LTC2630
Rail-to-Rail Output Considerations
In any rail-to-rail voltage output device, the output is limited
to voltages within the supply range.
Since the analog output of the DAC cannot go below ground,
it may limit for the lowest codes as shown in Figure 4b.
Similarly, limiting can occur near full scale when using the
supply as reference. If V
error (FSE) is positive, the output for the highest codes
limits at V
can occur if V
Offset and linearity are defi ned and tested over the region
of the DAC transfer function where no output limiting can
occur.
Board Layout
The PC board should have separate areas for the analog and
digital sections of the circuit. A single, solid ground plane
should be used, with analog and digital signals carefully
routed over separate areas of the plane. This keeps digital
signals away from sensitive analog signals and minimizes
the interaction between digital ground currents and the
analog section of the ground plane. The resistance from
16
CC
, as shown in Figure 4. No full-scale limiting
FS
is less than V
FS
= V
CC
CC
–FSE.
and the DAC full-scale
the LTC2630 GND pin to the ground plane should be as
low as possible. Resistance here will add directly to the
effective DC output impedance of the device (typically
0.1Ω). Note that the LTC2630 is no more susceptible to
this effect than any other parts of this type; on the con-
trary, it allows layout-based performance improvements
to shine rather than limiting attainable performance with
excessive internal resistance.
Another technique for minimizing errors is to use a sepa-
rate power ground return trace on another board layer.
The trace should run between the point where the power
supply is connected to the board and the DAC ground pin.
Thus the DAC ground pin becomes the common point for
analog ground, digital ground, and power ground. When
the LTC2630 is sinking large currents, this current fl ows
out the ground pin and directly to the power ground trace
without affecting the analog ground plane voltage.
It is sometimes necessary to interrupt the ground plane
to confi ne digital ground currents to the digital portion of
the plane. When doing this, make the gap in the plane only
as long as it needs to be to serve its purpose and ensure
that no traces cross over the gap.
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