LTC1446CS8#TR Linear Technology, LTC1446CS8#TR Datasheet - Page 7

• Manufacturer Part Number: LTC1446CS8#TR
• Description: IC DAC 12BIT DUAL R-R MPWR 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1446CS8#TR

• Settling Time: 14µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 5mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DEFI ITIO S
Resolution (n)
Resolution is defined as the number of digital input bits,
n. It defines the number of DAC output states (2
divide the full-scale range. The resolution does not imply
linearity.
Full-Scale Voltage (V
This is the output of the DAC when all bits are set to one.
Voltage Offset Error (V
The theoretical voltage at the output when the DAC is
loaded with all zeros. The output amplifier can have a true
negative offset, but because the part is operated from a
single supply, the output cannot go below zero. If the
offset is negative, the output will remain near 0V resulting
in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
Least Significant Bit (LSB)
One LSB is the ideal voltage difference between two
successive codes.
V
LSB = (V
OS
U
= V
NEGATIVE
OUT
FS
OFFSET
VOLTAGE
Figure 1. Effect of Negative Offset
– V
OUTPUT
– [(Code)(V
U
OS
0V
)/(2
FS
OS
n
)
– 1) = (V
)
FS
)/(2
DAC CODE
n
– 1)]
FS
– V
OS
1446/46L F01
)/4095
n
) that
Nominal LSBs:
Zero Scale Error (ZSE)
The output voltage when the DAC is loaded with all zeros.
Since this is a single supply part this value cannot be less
than 0V.
Integral Nonlinearity (INL)
End-point INL is the maximum deviation from a straight
line passing through the end points of the DAC transfer
curve. Because the part operates from a single supply and
the output cannot go below 0, the linearity is measured
between full scale and the code corresponding to the
maximum offset specification. The INL error at a given
input code is calculated as follows :
V
input code
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and
the ideal 1LSB change between any two adjacent codes.
The DNL error between any two codes is calculated as
follows:
OUT
V
LTC1446
LTC1446L LSB = 2.5V/4095 = 0.610mV
INL = [V
DNL = ( V
OUT
= the output voltage of the DAC measured at the given
= The measured voltage difference between two
adjacent codes
OUT
OUT
LSB = 4.095V/4095 = 1mV
– V
– LSB)/LSB
OS
– (V
LTC1446/LTC1446L
FS
– V
OS
)(Code/4095)]/LSB
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