LTC2704CGW-14#PBF Linear Technology, LTC2704CGW-14#PBF Datasheet
LTC2704CGW-14#PBF
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LTC2704CGW-14#PBF Summary of contents
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... There is also a reset fl ag and an offset adjustment pin for each channel. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. ...
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... Storage Temperature Range ...................– 65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC2704CGW-16#PBF LTC2704CGW-16#TRPBF LTC2704IGW-16#PBF LTC2704IGW-16#TRPBF LTC2704CGW-14#PBF LTC2704CGW-14#TRPBF LTC2704IGW-14#PBF LTC2704IGW-14#TRPBF LTC2704CGW-12#PBF LTC2704CGW-12#TRPBF LTC2704IGW-12#PBF LTC2704IGW-12#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are T REFG1 = REFG2 = GND = 0V. SYMBOL PARAMETER CONDITIONS Accuracy Resolution Monotonicity INL Integral Nonlinearity REF DNL Differential Nonlinearity REF GE Gain Error V ...
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LTC2704 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are T REFG1 = REFG2 = GND = 0V. SYMBOL PARAMETER CONDITIONS SR Slew Rate Capacitive Load Within Maximum Load Current Driving ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are T REFG1 = REFG2 = GND = 0V. SYMBOL PARAMETER C Digital Input Capacitance IN TIMING CHARACTERISTICS range, otherwise specifi cations are at T SYMBOL PARAMETER V = 4.5V to 5.5V DD ...
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LTC2704 TYPICAL PERFORMANCE CHARACTERISTICS LTC2704-16 Integral Nonlinearity (INL) 1 – = ±15V 0 REF ±10V RANGE 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 32768 49152 16384 65535 CODE 2704 G01 INL ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2704-16 Settling OUT 5V/DIV V OUT 1mV/DIV CS/LD 5V/DIV 2704 G18 2.5μs/DIV LTC2704-14 Integral Nonlinearity (INL) 1 – = ±15V 0 REF ±10V RANGE 0.6 0.4 0.2 ...
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LTC2704 TYPICAL PERFORMANCE CHARACTERISTICS LTC2704-16/LTC2704-14/LTC2704-12 Positive Slew 5V/DIV 2704 G13 – 2.5μs/DIV = ±15V REF ±10V RANGE 20V STEP 0.1Hz to 10Hz Noise 1μV/DIV – = ±15V 1s/DIV ...
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PIN FUNCTIONS CS/LD (Pin 10): Synchronous Chip Select and Load Pin. SDI (Pin 11): Serial Data Input. Data is clocked in on the rising edge of the serial clock when CS/LD is low. SRO (Pin 12): Serial Readback Data Output. ...
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LTC2704 BLOCK DIAGRAM REF1 43 VOSB 40 C1B 39 RFBB 37 OUTB DAC B 38 AGNDB + 41 – VOSA 4 C1A 5 RFBA 7 OUTA 6 DAC A AGNDA + 3 – REFM1 44 REFG1 ...
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OPERATION SERIAL INTERFACE When the CS/LD pin is taken low, the data on the SDI pin is loaded into the shift register on the rising edge of the clock signal (SCK pin). The minimum (24-bit wide) loading sequence required for ...
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LTC2704 OPERATION OUTPUT RANGES The LTC2704 is a quad DAC with software-programmable output ranges. SoftSpan provides two unipolar output ranges ( and 0V to 10V), and four bipolar ranges (±2.5V, ±5V, ±10V and – 2.5V to 7.5V). These ...
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OPERATION LTC2704 2704fc 13 ...
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LTC2704 OPERATION 14 2704fc ...
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OPERATION Examples 1. Using a 24-bit loading sequence, load DAC A with the unipolar range 10V, output at zero volts and all other DACs with the bipolar range of ±10V, outputs at zero volts. Note all DAC ...
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LTC2704 OPERATION should be driven with a Thevenin-equivalent impedance of 10kΩ or less. If not used, they should be shorted to their respective signal grounds, AGNDx. POWER-ON RESET AND CLEAR When power is fi rst applied to the LTC2704, all ...
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... The best scheme is to prefi lter low noise regulators such as the LT ® 1761 (positive) and LT1964 (negative). Refer to Linear Technology Application Note 101, Minimizing Switching Regulator Residue in Linear Regulator Outputs. The LTC2704 V and analog DAC switches and is very sensitive to noise. It must be treated as an analog supply ...
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LTC2704 APPLICATIONS INFORMATION Voltage Output/Feedback and Compensation The LTC2704 provides separate voltage output and feedback pins for each DAC. This allows compensation for resistance between the output and load current boosting stage such as an LT1970 may be ...
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APPLICATIONS INFORMATION POWER AND LOAD RETURN CURRENTS FLOW IN THIS REGION V AND V LOAD OUTA OUTB RETURN CURRENTS FLOW IN THIS REGION WHEN JP8 IS SET TO “TIE” DIGITAL RETURN CURRENTS FLOW IN THIS REGION Figure 5. DC752A Load ...
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LTC2704 PACKAGE DESCRIPTION 44 23 1.40 ±0.127 10.804 MIN 7.75 – 8.258 1 22 0.520 ±0.0635 0.800 BSC RECOMMENDED SOLDER PAD LAYOUT 7.417 – 7.595** (.292 – .299) 0.254 – 0.406 × 45° (.010 – .016) 0.231 – 0.3175 0.40 ...
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... Changed “DAC A” to DAC n in Table 1 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... REMOTE C1D 16 RFBD OUTSD 17 OUTD OUTD 20 AGNDD OUTD GND2 1 – V TIE 2 1,8,15,22,31,36 BAV99LT1 3 –15V REMOTE 1μF 1μF GND1 1 1 TIE REMOTE BAT54S BAT54S GND1 GND2 LT 0810 REV C • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2006 GND2 TIE REMOTE 2704 TA01a 2704fc ...