AD5310BRM-REEL Analog Devices Inc, AD5310BRM-REEL Datasheet
AD5310BRM-REEL
Specifications of AD5310BRM-REEL
Available stocks
Related parts for AD5310BRM-REEL
AD5310BRM-REEL Summary of contents
Page 1
FEATURES Single 10-Bit DAC 6-Lead SOT-23 and 8-Lead SOIC Packages Micropower Operation: 140 Power-Down to 200 +2 +5.5 V Power Supply Guaranteed Monotonic by ...
Page 2
AD5310–SPECIFICATIONS Parameter 2 STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Zero Code Error Full-Scale Error Gain Error Zero Code Error Drift Gain Temperature Coefficient 3 OUTPUT CHARACTERISTICS Output Voltage Range Output Voltage Settling Time Slew Rate Capacitive Load Stability Digital-to-Analog ...
Page 3
... Exposure to absolute maximum rating condi- Max– tions for extended periods may affect device reliability. Model AD5310BRT AD5310BRM *RT = SOT-23 SOIC. –3– AD5310 to T unless otherwise noted) MIN MAX Conditions/Comments SCLK Cycle Time ...
Page 4
AD5310 V OUT GND V DD SOT-23 Pin Numbers Pin No. Mnemonic Function 1 V Analog output voltage from DAC. The output amplifier has rail-to-rail operation. OUT 2 GND Ground reference point for all circuitry on the part ...
Page 5
TERMINOLOGY Relative Accuracy For the DAC, relative accuracy or Integral Nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer func- tion. A typical INL vs. code ...
Page 6
AD5310 –Typical Performance Characteristics + INL @ –1 INL @ 5V –2 –3 –4 0 200 400 600 800 1000 CODE Figure 2. Typical INL Plot +5V ...
Page 7
V = +5V DD 250 200 150 100 50 0 – 120 TEMPERATURE – C Figure 11. Supply Current vs. Temperature 800 600 400 200 ...
Page 8
AD5310 GENERAL DESCRIPTION D/A Section The AD5310 DAC is fabricated on a CMOS process. The architecture consists of a string DAC followed by an output buffer amplifier. Since there is no reference input pin, the power supply (V ) acts ...
Page 9
SYNC Interrupt In a normal write sequence, the SYNC line is kept low for at least 16 falling edges of SCLK and the DAC is updated on the 16th falling edge. However, if SYNC is brought high before the 16th ...
Page 10
AD5310 AD5310 to 68HC11/68L11 Interface Figure 26 shows a serial interface between the AD5310 and the 68HC11/68L11 microcontroller. SCK of the 68HC11/68L11 drives the SCLK of the AD5310, while the MOSI output drives the serial data line of the DAC. ...
Page 11
Bipolar Operation Using the AD5310 The AD5310 has been designed for single-supply operation but a bipolar output range is also possible using the circuit in Figure 30. The circuit below will give an output voltage range Rail-to-rail ...
Page 12
AD5310 0.071 (1.80) 0.059 (1.50) 0.051 (1.30) 0.035 (0.90) 0.006 (0.15) 0.002 (0.05) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 6-Lead SOT-23 (RT-6) 0.122 (3.10) 0.106 (2.70 0.118 (3.00) 0.098 (2.50 PIN 1 ...