AD9708ARU Analog Devices Inc, AD9708ARU Datasheet - Page 3

• Manufacturer Part Number: AD9708ARU
• Description: IC DAC 8BIT 100MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9708ARU

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 175mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• For Use With: AD9708-EBZ - BOARD EVAL FOR AD9708

DYNAMIC SPECIFICATIONS
P
DYNAMIC PERFORMANCE
AC LINEARITY TO NYQUIST
NOTES
1
Specifications subject to change without notice.
DIGITAL SPECIFICATIONS
P
DIGITAL INPUTS
Specifications subject to change without notice.
REV. B
Measured single ended into 50
arameter
arameter
Maximum Output Update Rate (f
Output Settling Time (t
Output Propagation Delay (t
Glitch Impulse
Output Rise Time (10% to 90%)
Output Fall Time (10% to 90%)
Output Noise (I
Output Noise (I
Signal-to-Noise and Distortion Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range to Nyquist
Logic “1” Voltage @ DVDD = +5 V
Logic “1” Voltage @ DVDD = +3 V
Logic “0” Voltage @ DVDD = +5 V
Logic “0” Voltage @ DVDD = +3 V
Logic “1” Current
Logic “0” Current
Input Capacitance
Input Setup Time (t
Input Hold Time (t
Latch Pulsewidth (t
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
= 10 MSPS; f
= 50 MSPS; f
= 50 MSPS; f
= 100 MSPS; f
= 100 MSPS; f
= 10 MSPS; f
= 50 MSPS; f
= 50 MSPS; f
= 100 MSPS; f
= 100 MSPS; f
= 10 MSPS; f
= 50 MSPS; f
= 50 MSPS; f
= 100 MSPS; f
= 100 MSPS; f
OUTFS
OUTFS
H
LPW
S
)
)
= 20 mA)
= 2 mA)
)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
ST
OUT
OUT
OUT
OUT
OUT
OUT
) (to 0.1%)
load.
= 1.00 MHz
= 1.00 MHz
= 12.51 MHz
= 1.00 MHz
= 1.00 MHz
= 12.51 MHz
= 1.00 MHz
= 1.00 MHz
= 12.51 MHz
PD
= 5.01 MHz
= 25.01 MHz
= 5.01 MHz
= 25.01 MHz
= 5.01 MHz
= 25.01 MHz
)
1
1
CLOCK
DB0–DB7
CLOCK
1
IOUTA
IOUTB
(T
)
OR
MIN
(T
Terminated, unless otherwise noted)
MIN
to T
to T
MAX
MAX
, AVDD = +5 V, DVDD = +5 V, I
, AVDD = +5 V, DVDD = +5 V, I
Figure 1. Timing Diagram
t
S
t
PD
–3–
0.1%
t
t
ST
LPW
Min
100
62
Min
3.5
2.1
–10
–10
2.0
1.5
3.5
t
H
OUTFS
OUTFS
0.1%
= 20 mA unless otherwise noted)
= 20 mA, Single-Ended Output, IOUTA, 50
Typ
125
35
1
5
2.5
2.5
50
30
50
50
48
50
45
–67
–67
–59
–64
–48
68
68
63
67
50
Typ
5
3
0
0
5
Max
–62
Max
1.3
0.9
+10
+10
AD9708
Doubly
Units
MSPS
ns
ns
pV-s
ns
ns
pA/ Hz
pA/ Hz
dB
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
Units
V
V
V
V
pF
ns
ns
ns
A
A