AD9762AR Analog Devices Inc, AD9762AR Datasheet - Page 2

IC DAC 12BIT 125MSPS 28-SOIC

AD9762AR

Manufacturer Part Number
AD9762AR
Description
IC DAC 12BIT 125MSPS 28-SOIC
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9762AR

Rohs Status
RoHS non-compliant
Settling Time
35ns
Number Of Bits
12
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
160mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Package
28SOIC W
Resolution
12 Bit
Conversion Rate
125 MSPS
Architecture
Segment
Digital Interface Type
Parallel
Number Of Outputs Per Chip
1
Output Type
Current
Full Scale Error
10 %FSR
Integral Nonlinearity Error
±4 LSB
Maximum Settling Time
0.035(Typ) us
Number Of Channels
1
Interface Type
Parallel
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Analog and Digital
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SOIC W
For Use With
AD9762-EB - BOARD EVAL FOR AD9762
Lead Free Status / Rohs Status
Not Compliant

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AD9762–SPECIFICATIONS
DC SPECIFICATIONS
Parameter
RESOLUTION
DC ACCURACY
ANALOG OUTPUT
REFERENCE OUTPUT
REFERENCE INPUT
TEMPERATURE COEFFICIENTS
POWER SUPPLY
OPERATING RANGE
NOTES
1
2
3
4
5
6
7
Specifications subject to change without notice.
Measured at IOUTA, driving a virtual ground.
Nominal full-scale current, I
Use an external buffer amplifier to drive any external load.
Reference bandwidth is a function of external cap at COMP1 pin and signal level. Refer to Figure 41.
For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.
Measured at f
Measured as unbuffered voltage output into 50 Ω R
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Full-Scale Output Current
Output Compliance Range
Output Resistance
Output Capacitance
Reference Voltage
Reference Output Current
Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth (w/o C
Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
Supply Voltages
Analog Supply Current (I
Digital Supply Current (I
Supply Current Sleep Mode (I
Power Dissipation
Power Dissipation
Power Dissipation
Power Supply Rejection Ratio—AVDD
Power Supply Rejection Ratio—DVDD
T
T
T
T
AVDD
DVDD
A
MIN
A
MIN
= +25°C
= +25°C
to T
to T
CLOCK
5
MAX
MAX
= 25 MSPS and f
1
6
7
7
(5 V, I
(5 V, I
(3 V, I
OUTFS
DVDD
, is 32 × the I
AVDD
3
OUTFS
OUTFS
OUTFS
2
OUT
(T
)
)
AVDD
6
MIN
COMP1
= 1.0 MHz.
= 20 mA)
= 20 mA)
= 2 mA)
to T
)
REF
)
MAX
4
current.
LOAD
, AVDD = +5 V, DVDD = +5 V, I
at IOUTA and IOUTB, f
Min
12
–2.5
–4.0
–1.5
–2.0
–0.025
–10
–10
2.0
–1.0
1.08
0.1
2.7
2.7
–0.4
–0.025
–40
–2–
CLOCK
OUTFS
= 100 MSPS and f
= 20 mA, unless otherwise noted)
Typ
± 0.75
± 1.0
± 0.5
± 0.75
± 2
± 1
100
5
1.20
100
1
1.4
0
± 50
± 100
± 50
5.0
5.0
25
1.5
133
190
45
OUT
= 40 MHz.
Max
+2.5
+4.0
+1.5
+2.0
+0.025
+10
+10
20.0
+1.25
1.32
1.25
5.5
5.5
30
2
8.5
160
+0.4
+0.025
+85
Units
Bits
LSB
LSB
LSB
LSB
% of FSR
% of FSR
% of FSR
mA
V
kΩ
pF
V
nA
V
MΩ
MHz
ppm of FSR/°C
ppm of FSR/°C
ppm of FSR/°C
ppm/°C
V
V
mA
mA
mA
mW
mW
mW
% of FSR/V
% of FSR/V
°C
REV. B

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