AD5546BRUZ Analog Devices Inc, AD5546BRUZ Datasheet - Page 4

• Manufacturer Part Number: AD5546BRUZ
• Description: IC DAC 16BIT PARALL IN 28-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5546BRUZ

• Data Interface: Parallel
• Design Resources: Precision, Unipolar, Inverting Conversion Using AD5546/56 DAC (CN0022) Precision, Bipolar Configuration for the AD5546/56 DAC (CN0024) Precision, Unipolar, Noninverting Configuration for the AD5546/56 DAC (CN0023) Precision, AC Reference Signal Attenuator Using AD5546/56 Multiplying DAC (CN0025)
• Settling Time: 500ns
• Number Of Bits: 16
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 55µW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Resolution (bits): 16bit
• Sampling Rate: 2MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 10µA
• Digital Ic Case Style: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5546/AD5556
Parameter
SUPPLY CHARACTERISTICS
AC CHARACTERISTICS
1
2
3
4
5
TIMING DIAGRAM
All static performance tests (except I
tied to the amplifier output. The op amp +IN is grounded, and the DAC I
These parameters are guaranteed by design and are not subject to production testing.
All input control signals are specified with t
All ac characteristic tests are performed in a closed-loop system using an AD8038 I-V converter amplifier except for THD where an AD8065 was used.
C6 is the C6 capacitor shown in Figure 20.
Output Voltage Settling
Multiplying Feedthrough
RS Pulse Width
WR to LDAC Delay Time
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
Reference Multiplying BW
DAC Glitch Impulse
Digital Feedthrough
Total Harmonic Distortion
Output Noise Density
Time
Error
4
OUT
) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is
Symbol
t
t
V
I
P
P
t
BW
Q
V
Q
THD
e
DD
LDAC
RS
LWD
S
DATA
N
DD RANGE
DISS
SS
OUT
D
WR
R
RS
= t
/V
F
REF
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
Conditions
V
V
V
V
Logic inputs = 0 V
Logic inputs = 0 V
∆V
To ±0.1% of full scale, data cycles from zero
scale to full scale to zero scale
V
V
V
WR = 1, LDAC toggles at 1 MHz
V
f = 1 kHz, BW = 1 Hz
DD
DD
DD
DD
REF
REF
REF
REF
DD
Figure 3. AD5546/AD5556 Timing Diagram
= 5 V
= 3 V
= 5 V
= 3 V
t
= 100 mV rms, data = full scale, C6 =5.6 pF
= 0 V, midscale minus 1 to midscale
= 100 mV rms, f = 10 kHz
= 5 V p-p, data = full-scale, f = 1 kHz
t
WR
DS
= ±5%
OUT
Rev. C | Page 4 of 20
t
DH
is tied to the op amp –IN. Typical values represent average readings measured at 25°C.
t
LWD
t
LDAC
t
RS
5
Min
20
35
0
0
2.7
Typ
0.5
6.8
−3
79
7
–103
12
Max
5.5
10
0.055
0.003
Unit
ns
ns
ns
ns
V
µA
mW
%/%
µs
MHz
nV-s
dB
nV-s
dB
nV/rt Hz