AD5763CSUZ-REEL7 Analog Devices Inc, AD5763CSUZ-REEL7 Datasheet - Page 21

DAC 16BIT DUAL 5V 2LSB 32-TQFP

AD5763CSUZ-REEL7

Manufacturer Part Number
AD5763CSUZ-REEL7
Description
DAC 16BIT DUAL 5V 2LSB 32-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5763CSUZ-REEL7

Design Resources
High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5763 (CN0074)
Settling Time
8µs
Number Of Bits
16
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Dual ±
Power Dissipation (max)
45mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5763CSUZ-REEL7
Manufacturer:
Analog Devices Inc
Quantity:
10 000
WORKED EXAMPLE OF OFFSET AND GAIN
ADJUSTMENT
Using the information provided in the previous section, the
following worked example demonstrates how the functions
of the AD5763 can be used to eliminate both offset and gain
errors. Because the AD5763 is factory calibrated, offset and
gain errors should be negligible. However, errors can be intro-
duced by the system that the AD5763 is operating within; for
example, a voltage reference value that is not equal to 2.048 V
introduces a gain error. An output range of ±4.096 V and twos
complement data coding is assumed.
Removing Offset Error
The AD5763 can eliminate an offset error in the range of −2 mV to
+1.98 mV with a step size of ⅛ of a 16-bit LSB.
Calculate the step size of the offset adjustment using the
following equation:
Measure the offset error by programming 0x0000 to the data
register and measuring the resulting output voltage. For this
example, the measured value is 614 μV.
Calculate the number of offset adjustment steps that this value
represents,
The offset error measured is positive, therefore, a negative
adjustment of 40 steps is required. The offset register is 8 bits
wide and the coding is twos complement. The required offset
register value can be calculated as follows:
Convert adjustment value to binary: 00101000.
Convert this to a negative twos complement number by
inverting all bits and adding 1: 11011000.
11011000 is the value that should be programmed to the offset
register.
Note that this twos complement conversion is not necessary
in the case of a positive offset adjustment. The value to be
programmed to the offset register is simply the binary
representation of the adjustment value.
Number
Offset
of
Adjust
Steps
Step
Measured
Size
Offset
Step
2
Offset
. 8
16
192
Size
8
Value
15
.
625
15
μV
614
.
625
μV
μV
40
Rev. A | Page 21 of 28
Steps
Removing Gain Error
The AD5763 can eliminate a gain error at negative full-scale
output in the range of −2 mV to +1.94 mV with a step size of
½ of a 16-bit LSB.
Calculate the step size of the gain adjustment
Measure the gain error by programming 0x8000 to the data
register and measure the resulting output voltage. The gain
error is the difference between this value and −4.096 V; for
this example, the gain error is −0.8 mV.
Calculate how many gain adjustment steps this value represents
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of 13 steps is required. The gain
register is six bits wide and the coding is twos complement, the
required gain register value can be determined as follows:
Convert adjustment value to binary: 001101.
The value to be programmed to the gain register is simply this
binary number.
Number
Gain
of
Adjust
Steps
Step
Measured
Size
Gain
Step
2
. 8
16
Gain
192
Size
2
Value
62
5 .
μV
62
0
8 .
5 .
mV
μV
AD5763
13
Steps

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