STK11C68-P25I Cypress Semiconductor Corp, STK11C68-P25I Datasheet - Page 3
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STK11C68-P25I
Manufacturer Part Number
STK11C68-P25I
Description
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Datasheet
1.STK11C68-P25I.pdf
(16 pages)
Specifications of STK11C68-P25I
Word Size
8b
Organization
8Kx8
Density
64Kb
Interface Type
Parallel
Access Time (max)
25ns
Operating Supply Voltage (typ)
5V
Package Type
PDIP
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
-40C to 85C
Pin Count
28
Mounting
Through Hole
Supply Current
90mA
Lead Free Status / Rohs Status
Not Compliant
Document Control #ML0007 Rev 0.3
ABSOLUTE MAXIMUM RATINGS
Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V
Voltage on Input Relative to V
Voltage on DQ
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . . 15mA
DC CHARACTERISTICS
Note b: I
Note c: I
Note d: E ≥ V
AC TEST CONDITIONS
CAPACITANCE
Note e: These parameters are guaranteed but not tested.
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
SYMBOL
SYMBOL
I
I
I
I
I
I
I
V
V
V
V
T
C
C
CC 1
CC 2
CC 3
SB 1
SB 2
ILK
OLK
A
IH
IL
OH
OL
IN
OUT
February, 2007
d
d
b
c
b
CC 1
CC 2
and I
is the average current required for the duration of the
Average V
Average V
Average V
5V, 25°C, Typical
Average V
(Standby, Cycling TTL Input Levels)
V
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “1” Voltage
Output Logic “0” Voltage
Operating Temperature
IH
0-7
CC
Input capacitance
Output Capacitance
will not produce standby current levels until any nonvolatile cycle in progress has timed out.
. . . . . . . . . . . . . . . . . . . . . . –0.5V to (V
PARAMETER
CC 3
Standby Current
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
CC
CC
CC
CC
PARAMETER
Current
e
Current
Current during STORE
Current at t
SS
(T
. . . . . . . . . . –0.6V to (V
AVAV
A
8
7
MAX
= 25°C, f = 1.0MHz)
= 200ns
pF
pF
UNITS
2.2
V
2.4
0
SS
ΔV = 0 to 3V
ΔV = 0 to 3V
MIN
COMMERCIAL
a
CONDITIONS
– .5
CC
CC
+ 0.5V)
+ 0.5V)
90
75
65
N/A
3
10
27
23
20
N/A
750
±1
±5
V
0.8
0.4
70
CC
STORE
MAX
+ .5
3
cycle (t
Note a: Stresses greater than those listed under “Absolute Maximum
2.2
V
2.4
–40
SS
INDUSTRIAL/
MIN
MILITARY
– .5 0.8
STORE
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
90
75
65
55
3
10
28
24
21
20
1500
±1
±5
V
0.4
85
OUTPUT
CC
MAX
) .
STK11C68 (SMD5962–92324)
+ .5 V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
V
V
V
°C
UNITS
Figure 1: AC Output Loading
255 Ohms
t
t
t
t
All Inputs Don’t Care, V
W ≥ (V
All Others Cycling, CMOS Levels
t
t
t
t
E ≥ (V
All Others V
V
V
V
V
All Inputs
All Inputs
I
I
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
OUT
OUT
CC
IN
CC
IN
= V
= V
= max
= max
= – 4mA
= 8mA
= 35ns
= 25ns, E ≥ V
= 25ns
= 45ns
= 55ns
= 35ns, E ≥ V
= 45ns, E ≥ V
= 55ns, E ≥ V
CC
CC
SS
SS
(V
– 0.2V)
- 0.2V)
to V
to V
IN
CC
CC
≤ 0.2V or ≥ (V
CC
, E or G ≥ V
NOTES
IH
IH
IH
IH
= 5.0V ± 10%)
5.0V
CC
480 Ohms
30 pF
INCLUDING
SCOPE AND
FIXTURE
= max
CC
IH
– 0.2V)