LTC2934CTS8-2#PBF Linear Technology, LTC2934CTS8-2#PBF Datasheet - Page 9

• Manufacturer Part Number: LTC2934CTS8-2#PBF
• Manufacturer: Linear Technology

Specifications of LTC2934CTS8-2#PBF

• Voltage Supervisor Type: Voltage Monitor
• Number Of Voltage Supervisors: 1
• Reset Threshold Voltage (min): AdjV
• Reset Threshold Voltage (max): AdjV
• Operating Supply Voltage (min): 1.6V
• Operating Supply Voltage (max): 5.5V
• Package Type: TSOT-23
• Operating Temperature Classification: Commercial
• Operating Temp Range: 0C to 70C
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

APPLICATIONS INFORMATION
Manual Reset Input
When V
reset input (MR) is pulled low, the RST output is forced
low. RST remains low for the selected reset timeout
period after the manual reset input is released and pulled
high. The manual reset input is pulled up internally through
900k to V
to pull down the manual reset input below its logic thresh-
old, a lower value pull-up resistor, placed between V
MR will fi x the problem.
Input MR is often pulled down through a pushbutton
switch requiring human contact. If extended ESD toler-
TYPICAL APPLICATIONS
+
+
+
POWER FAIL THRESHOLD = 2.628V
RESET THRESHOLD = 2.428V
1.5V
1.5V
1.5V
CC
CC
is above its reset threshold, and the manual
. If external leakage currents have the ability
845k
12.7k
154k
+
Alkaline Cell Stack Voltage Monitor
Li-Ion
698k
100k
RT
ADJ
PFI
PB1
324k
100k
LTC2934-2
GND
V
CC
0.1μF
3μA LDO
R
ESD
10k
Battery Monitor with Interface to Low Voltage Logic
MR
2934 TA03
*
PFO
RST
IN
SHDN
RT
ADJ
PFI
MR
LOW BATTERY
SYSTEM RESET
LTC2934-1
LT3009
GND
GND
V
0.1μF
CC
CC
and
OUT
RST
ADJ
PFO
*OPTIONAL RESISTOR FOR ADDED ESD PROTECTION
POWER FAIL FALLING THRESHOLD = 3.192V
RESET FALLING THRESHOLD = 1.696V
ance is required, series resistance between the switch and
the input is recommended. For most applications a 10k
resistor provides suffi cient current limiting.
Selecting the Reset Timeout Period
Use the RT input to select between two fi xed reset timeout
periods. Connect RT to ground for a 15ms timeout. Connect
RT to V
occurs after the ADJ input is driven above threshold. After
the reset timeout period, the RST output is allowed to pull
up to a high state.
1.18M
590k
+
POWER FAIL THRESHOLD = 2.727V
RESET THRESHOLD = 2.553V
CR2032
CC
1μF
for a 200ms timeout. The reset timeout period
100k
845k
10k
147k
Coin Cell Voltage Monitor
100k
1.8V
NMI
RST
RT
ADJ
PFI
LTC2934-2
V
μP
DD
GND
V
CC
2934 TA02
MR
2934 TA04
RST
PFO
LTC2934
LOW BATTERY
SYSTEM RESET
0.1μF
9
2934f