AD9888/PCB Analog Devices Inc, AD9888/PCB Datasheet

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AD9888/PCB

Manufacturer Part Number
AD9888/PCB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9888/PCB

Lead Free Status / Rohs Status
Not Compliant
GENERAL DESCRIPTION
The EVAL-AD9888EB can be used both to demonstrate the
performance of the AD9888 and to serve as an implementation
example for design and layout. To aid in real-world evaluation,
the EVAL-AD9888EB was designed to be connected as easily as
possible into another PCB, such as a graphics controller board.
REQUIREMENTS
The EVAL-AD9888EB requires a 5 V power supply, graphics
signals (through either of the 15-pin VGA connectors), and a
means to program the internal chip registers. PC compatible
hardware and software are provided for programming the
internal chip registers.
TYPICAL CONFIGURATION
In most cases, this evaluation board will be used to digitize
analog RGB graphics signals and pass the data on to another
board. To do this, connect the graphics signals to either of the
15-pin VGA connectors, supply 5 V to the board, and program
the internal serial register. Supplying power and programming
the chip are described later in this data sheet. The digitized data,
generated clock signals, and control signals are passed off the
board through the right-side Connector J3.
POWER
The EVAL-AD9888EB contains three 3.3 V voltage regulators,
which supply power to the AD9888’s three power supplies (refer
to the AD9888 Data Sheet). Best performance can be obtained
from the AD9888 when the analog supply (V
supply (P
primary 3.3 V supply (V
nominally when supplied with 5 V, but will work with a range of
voltages. Power is applied to the board through the right-side
connector (Pins 1, 2, 41, and 42 of J3). Typically, power is
supplied from another board, as is the case when using the
UXGA panel driver board.
SYNC SELECTION FOR J3 BOARD INTERFACE
The EVAL-AD9883EB provides for raw Hsync and Vsync
selection to connector J3 via the 3-pin jumpers labeled HS_SEL
and VS_SEL. If the raw Hsync and Vsync are to be used by the
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
VD
) have their own regulators separate from the
DD
). The three regulators work
D
) and the PLL
connected interface board (whether it be a panel driver board
or other type of board), these jumpers should be placed
appropriately depending on which video input is selected. If
input 0 is selected, the jumpers should be placed in the 0
position (as marked on the PCB); If 1 is selected, the jumpers
should be placed in the 1 position.
CHIP REGISTER NAMING CONVENTION
There are several references in this data sheet to specific control
registers in the AD9888. The convention used in this data sheet
is to specify the register number in hex, followed by an “h” and
by the bit number within the register. For example, [12h7]
means Register 12, Bit 7.
PROGRAMMING THE INTERNAL CHIP REGISTERS
Hardware and software are provided for programming the
AD9888 internal registers. The hardware consists of a standard
printer cable and a receiver chip located on the panel driver
board. The programming signals come onto the EVAL-
AD9888EB through Pins 38 and 39 on Connector J3. The
software is included on the installation CD-ROM and is
described in the Setup Software section.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
AD9888 Evaluation Board
Figure 1. The AD9888 Evaluation Board
© 2003 Analog Devices, Inc. All rights reserved.
EVAL-AD9888EB
www.analog.com

AD9888/PCB Summary of contents

Page 1

GENERAL DESCRIPTION The EVAL-AD9888EB can be used both to demonstrate the performance of the AD9888 and to serve as an implementation example for design and layout. To aid in real-world evaluation, the EVAL-AD9888EB was designed to be connected as easily ...

Page 2

EVAL-AD9888EB SETUP SOFTWARE The Display Electronics Product Line (DEPL) evaluation soft- ware is a Visual Basic® program that requires Windows® newer. The software comes on a self-installing CD-ROM that is included with the evaluation board. When installing the ...

Page 3

Clamp and Hsync Out Settings Clamp Placement, Clamp Duration, and Hsync Out Width controls are contained in Registers 05h to 07h and can be changed bit-by-bit, by setting a value for the registers (decimal value moving the control ...

Page 4

... ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model AD9888/PCB © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. PLL Timing Chart Horizontal Sync ...