AD8346-EVALZ Analog Devices Inc, AD8346-EVALZ Datasheet - Page 13

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AD8346-EVALZ

Manufacturer Part Number
AD8346-EVALZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8346-EVALZ

Lead Free Status / Rohs Status
Supplier Unconfirmed
AC-COUPLED INTERFACE
An ac-coupled interface can also be implemented, as shown in
Figure 29. This is an advantage because there is almost no
voltage loss due to the biasing network, allowing the AD8346
inputs to be driven by the full 2 V p-p differential signal from
the AD9761 (each of the DAC’s 4 outputs delivering 1 V p-p).
As in the dc-coupled case, the bias levels on the I and Q inputs
should be set to as precise a level as possible, relative to each
other. This prevents the introduction of additional input offset
voltages. In Figure 29, the bias level on each input is set to
approximately 1.2 V. The 2.43 kΩ resistors should have a ratio
tolerance of 0.1% or better.
INPUTS
DATA
DAC
SELECT
WRITE
CLOCK
DVDD
5V
CONTROL
DCOM
MUX
LATCH
LATCH
SLEEP
Q
I
AD9761
2 ×
2 ×
R
2kΩ
SET
FS ADJ
AVDD
DAC
DAC
Q
I
REFIO
Figure 29. AC-Coupled DAC Interface
0.1μF
QOUTA
QOUTB
IOUTA
IOUTB
Rev. A | Page 13 of 20
100Ω
100Ω
C
100Ω
100Ω
FILTER
C
FILTER
0.01μF
0.01μF
The network shown has a high-pass corner frequency of
approximately 14.3 kHz (note that the 12 kΩ input impedance
of the AD8346 has been factored into this calculation).
Increasing the resistors in the network or increasing the
coupling capacitance reduces the corner frequency further.
Note that the LO suppression can be manually optimized by
replacing a portion of the four top 2.43 kΩ resistors with
potentiometers. In this case, the bottom four resistors in the
biasing network no longer need to be precision devices.
0.01μF
2.43kΩ
0.01μF
2.43kΩ
2.43kΩ
2.43kΩ
5V
1V p-p EACH PIN
WITH V
1kΩ
2.43kΩ
2.43kΩ
2.43kΩ
CM
2.43kΩ
= 1.2V
0.1μF
QBBN
IBBP
IBBN
QBBP
VPS1
SPLITTER
PHASE
AD8346
VPS2
Σ
VOUT
LOIN
LOIP
AD8346