CAT5241Y-10 ON Semiconductor, CAT5241Y-10 Datasheet - Page 8

• Manufacturer Part Number: CAT5241Y-10
• Manufacturer: ON Semiconductor

Specifications of CAT5241Y-10

• Number Of Elements: 4
• # Of Taps: 64
• Resistance (max): 10KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (2-Wire/I2C)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 6V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / Rohs Status: Compliant

Write Operation
condition and the slave address information to the Slave
device. After the Slave generates an acknowledge, the
Master sends the instruction byte that defines the requested
operation of CAT5241. The instruction byte consist of a
four−bit opcode followed by two register selection bits and
two pot selection bits. After receiving another acknowledge
from the Slave, the Master device transmits the data to be
written into the selected register. The CAT5241
acknowledges once more and the Master generates the
STOP condition, at which time if a non−volatile data register
is being selected, the device begins an internal programming
cycle to non−volatile memory. While this internal cycle is in
progress, the device will not respond to any request from the
Master device.
* A0, A1, A2 and A3 correspond to pin A0, A1, A2 and A3 of the device.
** A0, A1, A2 and A3 must compare to its corresponding hard wired input pins.
In the Write mode, the Master device sends the START
BUS ACTIVITY:
SDA LINE
MASTER
CAT5241
R
S
A
T
T
S
Fixed
0
SLAVE/DPP
ADDRESS
Figure 6. Slave Address Bits
1
Variable
Figure 7. Write Timing
http://onsemi.com
0
A
C
K
1
INSTRUCTION
8
A3
BYTE
Acknowledge Polling
of the typical write cycle time. Once the stop condition is
issued to indicate the end of the host’s write operation, the
CAT5241 initiates the internal write cycle. ACK polling can
be initiated immediately. This involves issuing the start
condition followed by the slave address. If the CAT5241 is
still busy with the write operation, no ACK will be returned.
If the CAT5241 has completed the write operation, an ACK
will be returned and the host can then proceed with the next
instruction operation.
The disabling of the inputs can be used to take advantage
A2
A1
C
A
K
A0
DR WCR DATA
C
A
K
S
O
P
P
T