54ABT273W-QML National Semiconductor, 54ABT273W-QML Datasheet - Page 2

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54ABT273W-QML

Manufacturer Part Number
54ABT273W-QML
Description
Manufacturer
National Semiconductor
Type
Dr
Datasheet

Specifications of 54ABT273W-QML

Logic Family
ABT
Technology
BiCMOS
Number Of Bits
8
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
5V
Package Type
CERPACK
Propagation Delay Time
8.2ns
Output Type
Standard
Low Level Output Current
48mA
High Level Output Current
-24mA
Frequency (max)
150MHz
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
20
Lead Free Status / Rohs Status
Not Compliant
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Connection Diagrams
Truth Table
Mode Select-Function Table
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Reset (Clear)
Load “1”
Load “0”
Operating Mode
Pin Assignment for DIP
and Flatpack
MR
H
H
L
Inputs
CP
N
N
X
DS100205-1
D
X
h
l
n
D
MR
CP
Q
Names
0
0
Pin
–D
–Q
Output
7
7
Q
H
L
L
n
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
(Active LOW)
(Active Rising Edge)
Description
2
H = HIGH Voltage Level steady state
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock tran-
sition
L = LOW Voltage Level steady state
I = LOW Voltage Level one setup time prior to the LOW-to-HIGH clock tran-
sition
X = Immaterial
N
= LOW-to-HIGH clock transition
Pin Assignment
for LCC
DS100205-2
DS100205-3

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