AD664TD-BIP Analog Devices Inc, AD664TD-BIP Datasheet
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AD664TD-BIP
Specifications of AD664TD-BIP
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AD664TD-BIP Summary of contents
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FEATURES Four Complete Voltage Output DACs Data Register Readback Feature “Reset to Zero” Override Multiplying Operation Double-Buffered Latches Surface Mount and DIP Packages MIL-STD-883 Compliant Versions Available APPLICATIONS Automatic Test Equipment Robotics Process Control Disk Drives Instrumentation Avionics PRODUCT ...
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AD664–SPECIFICATIONS Model RESOLUTION ANALOG OUTPUT 1 Voltage Range UNI Versions BIP Versions Output Current Load Resistance Load Capacitance Short-Circuit Current ACCURACY Gain Error Unipolar Offset 3 Bipolar Zero 4 Linearity Error Linearity MIN MAX Differential Linearity Differential ...
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Model DIGITAL INPUTS Data Inputs DGND IL IN CS/DS0/DS1/RST/RD/ ...
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AD664 FUNCTIONAL DESCRIPTION The AD664 combines four complete 12-bit voltage output D/A converters with a fast, flexible digital input/output port on one monolithic chip available in two forms, a 44-pin version shown in Figure 1a and a 28-pin ...
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Mode = UNI 000000000000 = 0 V Gain = 1 100000000000 = V 111111111111 = V 000000000000 = 0 V Gain = 2 100000000000 = V 111111111111 = 2 DEFINITIONS OF SPECIFICATIONS LINEARITY ERROR: Analog Devices defines linearity error as ...
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AD664 ANALOG CIRCUIT CONSIDERATIONS Grounding Recommendations The AD664 has two pins, designated ANALOG and DIGITAL ground. The analog ground pin is the “high quality” ground ref- erence point for the device. A unique internal design has resulted in low analog ...
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Multiplying Mode Performance Figure 6 illustrates the typical open-loop gain and phase perfor- mance of the output amplifiers of the AD664. +20 GAIN +15 +10 PHASE +5 0 10k 100k FREQUENCY – Figure 6. Gain and Phase Performance ...
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AD664 Function Load 1st Rank (data) DACA DACB DACC DACD Load 2nd Rank (data) Readback 2nd Rank (data) Reset 1 Transparent All DACs DACA DACB DACC DACD 1, 2 Mode Select 1st Rank 2nd Rank 1 Readback Mode Update 2nd ...
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Figure 10a. Preload First Rank of a DAC SYMBOL MIN (ns) MIN (ns 100 ...
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AD664 occupies the topmost eight bits of the input word. The last four bits of the input word are “don’t cares.” Figure 15 shows the format of the MODE SELECT word. The first four bits determine the gain range of ...
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Fully transparent operation can be thought simultaneous load of data from Figure 9a where replacing LS with TR causes all 4 DACs to be loaded at once. The Fully transparent mode is achieved by asserting lows on ...
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AD664 Output Loads Readback timing is tested with the output loads shown in Figure 22. Figure 22. Output Loads Asynchronous Reset Operation The asynchronous reset signal shown in Figure 23 may be asserted at any time. A minimum pulse width ...
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Figure 25a. Simple AD664 to MC6801 Interface REV. C Expansion of the scheme employed in Figure 25a results in that shown in Figure 25c. Here, two AD664s are connected to an MC6801, providing a total of eight 12-bit, software program- ...
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AD664 The schemes in Figure 25 illustrate some of the trade-offs which a designer may make when configuring a system. For example, the designer may use I/O lines instead of address bits or vice versa. This decision may be influenced ...
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IBM PC* Interface Figure 27 illustrates a simple interface between an IBM PC and an AD664. The three least significant address bits are used to select the Quad and DAC. The next two address bits are used for LS and ...
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AD664 Table III details the memory locations and addresses used by this interface. HEX 300 301 302 303 304 305 306 307 308 309 30A 30B 30C 30D 30E 30F 310 311 ...
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The following IBM PC Basic routine produces four output volt- age ramps from one AD664. Line numbers 10 through 70 de- fine the hardware addresses for the first and second ranks of DAC registers as well as the first and ...
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AD664 Simple AD664 to MC68000 Interface Figure 28 shows an AD664 connected to an MC68000. In this memory-mapped I/O scheme, the “left-justified” data is written in one 12-bit input word. Four address bits are used to perform the on-chip D/A ...
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APPLICATIONS OF THE AD664 “Tester-Per-Pin” ATE Architecture Figure 29 shows the AD664 used in a single channel of a digital test system. In this scheme, the AD664 supplies four individual output voltages. Two are provided to the V puts of ...
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... C to +85 C AD664SD-UNI – +125 C AD664SD-BIP – +125 C AD664TD-UNI – +125 C AD664TD-BIP – +125 C NOTES 1 For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current AD664/883B data sheet Ceramic DIP Leadless Ceramic Chip Carrier Leaded Chip Carrier Plastic DIP Plastic Leaded Chip Carrier. ...