CAT5419WI-10 ON Semiconductor, CAT5419WI-10 Datasheet - Page 2
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CAT5419WI-10
Manufacturer Part Number
CAT5419WI-10
Description
Manufacturer
ON Semiconductor
Datasheet
1.CAT5419WI-10.pdf
(16 pages)
Specifications of CAT5419WI-10
Number Of Elements
2
# Of Taps
64
Resistance (max)
10KOhm
Power Supply Requirement
Single
Interface Type
Serial (2-Wire/I2C)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
6V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Compliant
CAT5419
PIN DESCRIPTIONS
SCL: Serial Clock
The CAT5419 serial clock input pin is used to
clock all data transfers into or out of the device.
SDA: Serial Data
The CAT5419 bidirectional serial data pin is used
to transfer data into and out of the device. The
SDA pin is an open drain output and can be wire-
OR'd with the other open drain or open collector
outputs.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when
addressing multiple devices. A total of sixteen
devices can be addressed on a single bus. A
match in the slave address must be made with the
address input in order to initiate communication
with the CAT5419.
R
The R
connections on a mechanical potentiometer.
R
The R
a mechanical potentiometer.
¯¯¯ : Write Protect Input
WP
The WP
writes to the data registers (change of wiper
control register is allowed) and when tied high or
left floating normal read/write operations are
allowed. See page 7, Write Protection for more
details.
DEVICE OPERATION
The CAT5419 is two resistor arrays integrated with 2wire serial interface logic, four 6-bit wiper control registers
and sixteen 6-bit, non-volatile memory data registers. Each resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical
potentiometer (R
at the ends of the series resistors are connected to the output wiper terminals (R
Only one tap point for each potentiometer is connected to its wiper terminal at a time and is determined by the
value of the wiper control register. Data can be read or written to the wiper control registers or the non-volatile
memory data registers via the 2-wire bus. Additional instructions allow data to be transferred between the wiper
control registers and each respective potentiometer's non-volatile data registers. Also, the device can be
instructed to operate in an "increment/decrement" mode.
Doc. No. MD-2115 Rev. J
H
W
, R
: Wiper
¯¯¯ pin when tied low prevents non-volatile
L
W
H
: Resistor End Points
and R
pins are equivalent to the wiper terminal of
L
pins are equivalent to the terminal
H
and R
L
). R
H
and R
L
are symmetrical and may be interchanged. The tap positions between and
SOIC
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
2
TSSOP
Pin
19
20
21
22
23
24
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Name
GND
SDA
SCL
V
R
¯¯¯
R
R
WP
R
R
R
NC
NC
NC
NC
NC
NC
NC
NC
NC
A2
A1
A3
A0
CC
W0
W1
L0
H0
L1
H1
W
) by a CMOS transistor switch.
Function
Supply Voltage
High Reference Terminal for
Potentiometer 0
Wiper Terminal for
Potentiometer 0
Write Protection
High Reference Terminal for
Potentiometer 1
Wiper Terminal for
Potentiometer 1
Ground
Low Reference Terminal for
Potentiometer 0
Device Address
Serial Data Input/Output
Device Address
Low Reference Terminal for
Potentiometer 1
No Connect
No Connect
No Connect
No Connect
Bus Serial Clock
Device Address
No Connect
Device Address, LSB
No Connect
No Connect
No Connect
No Connect
Characteristics subject to change without notice
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