DS1851E-010+ Maxim Integrated Products, DS1851E-010+ Datasheet - Page 17

IC DAC DUAL NV TEMP CNTRL 8TSSOP

DS1851E-010+

Manufacturer Part Number
DS1851E-010+
Description
IC DAC DUAL NV TEMP CNTRL 8TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1851E-010+

Number Of Bits
8
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 95°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Settling Time
-
NOTES:
1. All voltages are referenced to ground.
2. A fast-mode device can be used in a standard-mode system, but the requirement t
3. After this period, the first clock pulse is generated.
4. The maximum t
5. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the
6. C
7. EEPROM-write begins after a STOP condition occurs.
8. Measured with SDA = SCL = V
9. Valid at 25°C only.
10. With V
11. 0.8% is equivalent to 2 LSB.
PACKAGE INFORMATION
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a
different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
then be met. This will automatically be the case if the device does not stretch the LOW period of the
SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next
data bit to the SDA line t
SCL signal.
VI
B
H MIN
- total capacitance of one bus line in pF, timing referenced to (0.9)(V
8 TSSOP
rc
of the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
= V
CC
-1.25 and V
HD:DAT
has only to be met if the device does not stretch the LOW period (t
RMAX
PACKAGE CODE
rg
= 1.25 + GND.
+ t
rc
SU:DAT
H8+1
= V
CC
= 1000 + 250 = 1250ns before the SCL line is released.
, and V
17 of 18
rg
= GND. The outputs OutV and OutG are left open.
OUTLINE NO.
21-0175
CC
) and (0.1)(V
LAND PATTERN NO.
SU:DAT
90-0248
> 250ns must
CC
LOW
).
) of the
DS1851

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