24AA04-I/SNG Microchip Technology, 24AA04-I/SNG Datasheet - Page 14

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24AA04-I/SNG

Manufacturer Part Number
24AA04-I/SNG
Description
EEPROM Serial-I2C 4K-Bit 2Block x 256 x 8 1.8V/2.5V/3.3V/5V 8-Pin SOIC N Tube
Manufacturer
Microchip Technology
Datasheet

Specifications of 24AA04-I/SNG

Package
8SOIC N
Interface Type
Serial-I2C
Density
4 Kb
Maximum Operating Frequency
0.4 MHz
Maximum Random Access Time
900 ns
Typical Operating Supply Voltage
1.8|2.5|3.3|5 V
Organization
2Blockx256x8
Data Retention
200(Min) Year
Operating Temperature
-40 to 85 °C

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24AA04-I/SNG
Manufacturer:
MICROCHIP
Quantity:
12 000
24AAXX/24LCXX/24FCXX
5.7
A control byte is the first byte received following the
Start condition from the master device (Figure 5-4).
The control byte begins with a 4-bit control code. For
the 24XX, this is set as ‘
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1, A0). The Chip Select bits
allow the use of up to eight 24XX devices on the same
bus and are used to select which device is accessed.
The Chip Select bits in the control byte must corre-
spond to the logic levels on the corresponding A2, A1
and A0 pins for the device to respond. These bits are,
in effect, the three Most Significant bits of the word
address.
For 24XX128 and 24XX256 in the MSOP package, the
A0 and A1 pins are not connected. During device
addressing, the A0 and A1 Chip Select bits (Figure 5-4)
should be set to ‘0’. Only two 24XX128 or 24XX256
MSOP packages can be connected to the same bus.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected.
FIGURE 5-4:
DS21930C-page 14
24XX1025
* Chip Select bits A1 and A0 must be set to ‘0’ for 24XX128/256 devices in the MSOP package.
24XX128
24XX256
24XX512
x = “don’t care” bit
24XX024/025
24XX32
24XX64
Start bit
24C01C
24C02C
Device Addressing For Devices
With Functional Address Pins
S
S
S
S
S
S
Control Code
1
1
1
1
1
1
S
S
S
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
Control Byte
CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR
DEVICES WITH ADDRESS PINS
1010’
0 A2 A1 A0 R/W ACK
0 A2 A1 A0 R/W ACK
0 A2 A1 A0 R/W ACK
0 A2 A1 A0 R/W ACK
0 A2 A1 A0 R/W ACK
0 B0 A1 A0 R/W ACK
Chip Select bits*
0
0
0
(Read = 1, Write = 0)
1
1
1
binary for read and write
Control Byte
Read/Write bit
0
0
0
A2
A2
A2
A1
A1
A1
Acknowledge
A0
A0
A0
bit
x
x
x
x
A15 A14 A13 A12 A11 A10 A9 A8
A15 A14 A13 A12 A11 A10 A9 A8
R/W
R/W
R/W
A14 A13 A12 A11 A10 A9 A8
x
x
x
ACK
ACK
ACK
A13 A12 A11 A10 A9 A8
Address High Byte
x
x
For
24XX1025), the next two bytes received define the
address of the first data byte. Depending on the prod-
uct density, not all bits in the address high byte are
used. A15, A14, A13 and A12 are “don’t care” for
24XX32. A15, A14 and A13 are “don’t care” for
24XX64. A15 and A14 are “don’t care” for 24XX128.
A15 is “don’t care” for 24XX256. All address bits are
used for the 24XX512 and 24XX1025. The upper
address bits are transferred first, followed by the Less
Significant bits.
Following the Start condition, the 24XX monitors the
SDA bus. Upon receiving a ‘
device select bits and the R/W bit, the slave device out-
puts an Acknowledge signal on the SDA line. The
address byte(s) follow the acknowledge.
The 24XX1025 has an internal address boundary
limitation that is divided into two segments of 512 Kbits.
Block select bit ‘B0’ is used to control access to each
segment. Contiguous writes cannot be performed
across this boundary.
A12 A11 A10 A9 A8
x
higher
A11 A10 A9 A8
x
A7
A7
density
A6
.
.
Address Byte
.
.
.
© 2007 Microchip Technology Inc.
devices
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A7
A7
A7
A7
A7
A7
1010’
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Address Low Byte
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(24XX32
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code, appropriate
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A0
A0
A0
.
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through
A0
A0
A0
A0
A0
A0

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