MAX509BCAP Maxim Integrated Products, MAX509BCAP Datasheet - Page 14

• Manufacturer Part Number: MAX509BCAP
• Description: IC DAC QUAD SERIAL 8BIT 20-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX509BCAP

• Settling Time: 6µs
• Number Of Bits: 8
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 800mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

If multiple devices share a common DIN line, Figure 7's
configuration provides simultaneous update by strob-
ing LDAC low. CS1, CS2, CS3... are driven separately,
thus controlling which data are written to devices 1, 2, 3....
The MAX509/MAX510 contain four matched voltage-
output DACs. The DACs are inverted R-2R ladder net-
works that convert 8-bit digital words into equivalent
analog output voltages in proportion to the applied ref-
erence voltages. Each DAC in the MAX509 has a sepa-
rate reference input, while the two reference inputs in
the MAX510 each share a pair of DACs. The two refer-
ence inputs permit different full-scale output voltage
ranges for each pair of DACs. A simplified diagram of
one of the four DACs is shown in Figure 8.
The MAX509/MAX510 can be used for multiplying
applications. The reference accepts both DC and AC
signals. The voltage at each REF input sets the full-
scale output voltage for its respective DAC(s). If the ref-
erence voltage is positive, both the MAX509 and
MAX510 can be operated from a single supply. If dual
supplies are used, the reference input can vary from
V
impedance at REF is code dependent, with the lowest
value (16kΩ for the MAX509 and 8kΩ for the MAX510)
occurring when the input code is 55 hex or 0101 0101.
The maximum value, practically infinity, occurs when
the input code is 00 hex. Since the REF input imped-
ance is code dependent, the DAC's reference sources
must have a low output impedance (no more than 32Ω
for the MAX509 and 16Ω for the MAX510) to maintain
output linearity. The REF input capacitance is also code
Quad, Serial 8-Bit DACs
with Rail-to-Rail Outputs
Figure 8. DAC Simplified Circuit Diagram
14
SS
AGND
REF_
SHOWN FOR ALL 1 ON DAC
to V
______________________________________________________________________________________
DD
2R
, but is always referred to AGND. The input
2R
D0
R
2R
D5
R
D6
2R
R
Analog Section
Reference Input
DAC Operation
2R
2R
D7
OUT_
dependent: 15pF typical for the MAX509 and 30pF
typical for the MAX510.
The output voltage for any DAC can be represented by
a digitally programmable voltage source as:
where NB is the numerical value of the DAC's binary
input code.
All MAX509/MAX510 voltage outputs are internally
buffered by precision unity-gain followers that slew at
up to 1V/µs. The outputs can swing from V
With a 0V to +4V (or +4V to 0V) output transition, the
amplifier outputs will settle to 1/2LSB in typically 6µs
when loaded with 10kΩ in parallel with 100pF.
The buffer amplifiers are stable with any combination of
resistive loads ≥ 2kΩ and capacitive loads ≤ 300pF.
The MAX509/MAX510 are fully specified to operate with
V
mance is guaranteed for both single- and dual-supply
operation. The zero-code output error is less than 14mV
when operating from a single +5V supply.
The DACs work well with reference voltages from V
to V
The preferred power-up sequence is to apply V
then V
time is also acceptable. In either case, the voltage
applied to REF should not exceed V
up or at any other time. If proper power sequencing is
not possible, connect an external Schottky diode
between V
Absolute Maximum Ratings . Do not apply signals to
the digital inputs before the device is fully powered up.
In single-supply operation (AGND = DGND = V
0V), AGND, DGND and V
together in a "star" ground at the chip. This ground
should then return to the highest quality ground avail-
able. Bypass V
close to V
operation, bypass V
Careful PC board layout minimizes crosstalk among
DAC outputs, reference inputs, and digital inputs.
Figures 9 and 10 show suggested circuit board layouts
to minimize crosstalk.
__________Applications Information
DD
DD
= 5V ±10% and V
. The reference voltage is referred to AGND.
DD
, but bringing up both supplies at the same
VOUT = (NB x VREF) / 256
SS
DD
and AGND to ensure compliance with the
and DGND as possible. In dual-supply
DD
Reference Operating Ranges
with a 0.1µF capacitor, located as
SS
to AGND with 0.1µF.
and Ground Management
Power-Supply Bypassing
SS
= 0V to -5.5V. 8-bit perfor-
SS
Output Buffer Amplifiers
should be connected
Power Supply and
DD
during power-
SS
to V
SS
SS
and
DD
SS
=
.