A3966SLBTR-T Allegro, A3966SLBTR-T Datasheet - Page 5

• Manufacturer Part Number: A3966SLBTR-T
• Manufacturer: Allegro

Internal PWM Current Control. The A3966SA and
A3966SLB dual H-bridges are designed to drive both
windings of a bipolar stepper motor. Load current can be
controlled in each motor winding by an internal fixed-
frequency PWM control circuit. The current-control
circuitry works as follows: when the outputs of the H-
bridge are turned on, current increases in the motor wind-
ing. The load current is sensed by the current-control
comparator via an external sense resistor (R
current continues to increase until it reaches the predeter-
mined value, set by the selection of external current-
sensing resistors and reference input voltage (V
according to the equation:
where I
to the base-drive current of the sink driver transistor.
enable latch, turning off the source driver of that H-bridge.
The source turn off of one H-bridge is independent of the
other H-bridge. Load inductance causes the current to
recirculate through the sink driver and ground-clamp
diode. The current decreases until the internal clock
oscillator sets the source-enable latches of both H-bridges,
turning on the source drivers of both bridges. Load current
increases again, and the cycle is repeated.
Enlargement A
OSCILLATOR
www.allegromicro.com
At the trip point, the comparator resets the source-
INTERNAL
V
I
OUT
PHASE
SO
+
0
–
is the sense-current error (typically 18 mA) due
BRIDGE
ON
I
TRIP
BRIDGE
= I
ON
t
d
OUT
R C
T T
I
TRIP
+ I
SO
SOURCE
OFF
See Enlargement A
= V
t
blank
REF
/(4 R
OFF
ALL
FUNCTIONAL DESCRIPTION
S
S
). Load
)
REF
Dwg. WM-003-2
)
the external timing components R
can be approximately calculated as:
where t
20 kΩ to 100 kΩ and 470 pF to 1000 pF respectively.
Nominal values of 56 kΩ and 680 pF result in a clock
frequency of 25 kHz.
Current-Sense Comparator Blanking. When the
source driver is turned on, a current spike occurs due to
the reverse-recovery currents of the clamp diodes and
switching transients related to distributed capacitance in
the load. To prevent this current spike from erroneously
resetting the source enable latch, the current-control
comparator output is blanked for a short period of time
when the source driver is turned on. The blanking time is
set by the timing component C
tion:
time of 1.3 µs.
the H-bridge outputs are switched by the PHASE or
ENABLE inputs. This internally generated blank time is
approximately 1 µs.
The frequency of the internal clock oscillator is set by
The range of recommended values for R
A nominal C
The current-control comparator is also blanked when
blank
is defined below.
T
f
PWM MOTOR DRIVER
osc
t
value of 680 pF will give a blanking
blank
DUAL FULL-BRIDGE
= 1/(R
= 1900 C
V
BB
R S
T
C
T
T
according to the equa-
+ t
T
T
(µs).
C
blank
T
. The frequency
BRIDGE ON
SOURCE OFF
ALL OFF
)
Dwg. EP-006-16
T
and C
3966
T
are
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