A3966SLBTR-T Allegro, A3966SLBTR-T Datasheet - Page 6

• Manufacturer Part Number: A3966SLBTR-T
• Manufacturer: Allegro

A3966
Internal PWM Current Control. The A3966 dual full-
bridges are designed to drive both windings of a bipolar
stepper motor. Load current can be controlled in each motor
winding by an internal fi xed-frequency PWM control cir-
cuit. The current-control circuitry works as follows: when
the outputs of the full-bridge are turned on, current increas-
es in the motor winding. The load current is sensed by the
current-control comparator via an external sense resistor
(R
the predetermined value, set by the selection of external
current-sensing resistors and reference input voltage (V
according to the equation:
where I
to the base-drive current of the sink driver transistor.
able latch, turning off the source driver of that full-bridge.
The source turn-off of one full-bridge is independent of
the other full-bridge. Load inductance causes the current to
recirculate through the sink driver and ground-clamp diode.
The current decreases until the internal clock oscillator sets
the source-enable latches of both Full-bridges, turning on
the source drivers of both bridges. Load current increases
again, and the cycle is repeated.
the external timing components R
Enlargement A
OSCILLATOR
S
). Load current continues to increase until it reaches
INTERNAL
At the trip point, the comparator resets the source-en-
The frequency of the internal clock oscillator is set by
V
I
OUT
PHASE
SO
+
0
–
is the sense-current error (typically 18 mA) due
BRIDGE
ON
I
TRIP
BRIDGE
= I
ON
t
d
OUT
R C
T T
I
TRIP
+ I
SO
SOURCE
OFF
See Enlargement A
= V
T
t
blank
C
REF
T
. The frequency can
ALL
OFF
/(4 R
FUNCTIONAL DESCRIPTION
S
)
Dwg. WM-003-2
Dual Full-Bridge PWM Motor Driver
REF
)
be approximately calculated as:
where t
20 to 100 kΩ and 470 to 1000 pF respectively. Nominal
values of 56 kΩ and 680 pF result in a clock frequency of
25 kHz.
Current-Sense Comparator Blanking. When the
source driver is turned on, a current spike occurs due to the
reverse-recovery currents of the clamp diodes and switch-
ing transients related to distributed capacitance in the load.
To prevent this current spike from erroneously resetting the
source enable latch, the current-control comparator output
is blanked for a short period of time when the source driver
is turned on. The blanking time is set by the timing compo-
nent C
of 1.3 μs.
the Full-bridge outputs are switched by the PHASE or
ENABLE inputs. This internally generated blank time is
approximately 1 μs.
The range of recommended values for R
A nominal C
The current-control comparator is also blanked when
T
blank
according to the equation:
is defi ned below.
T
value of 680 pF will give a blanking time
f
osc
t
blank
= 1/(R
= 1900 C
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
V
BB
R S
T
C
T
+ t
T
(μs).
blank
BRIDGE ON
SOURCE OFF
ALL OFF
)
T
Dwg. EP-006-16
and C
T
are
6