SI5338M-A-GMR Silicon Laboratories Inc, SI5338M-A-GMR Datasheet - Page 104

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SI5338M-A-GMR

Manufacturer Part Number
SI5338M-A-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheets
Si5338
Reset value = xxxx xxxx
Reset value = xxxx xxxx
104
Register 116.
Register 117.
Name
Name
Type
Type
Bit
Bit
6:0
7:0
Bit
Bit
7
D7
R/W
D7
MS2_PHOFF[14:8]
MS2_PHSTEP[7:0]
Reserved
Name
Name
D6
D6
D5
Reserved.
Must write 1b to this bit.
MultiSynth2 Initial Phase Offset.
MultiSynth2_PHOFF[14:0] is a 2s complement number. The initial
phase offset is MultiSynth2_PHOFF[14:0] x Tvco/128 where Tvco is
the period of the VCO.
MultiSynth2 Phase Step Size.
The phase step size is MultiSynth2_PHSTEP[13:0] x Tvco/128 where
Tvco is the period of the VCO. Either the phase inc/dec pins (if avail-
able) or register 74[1:0] will control the stepping of phase. A phase
increment will delay the clock edge.
D5
MS2_PHSTEP[7:0]
D4
Rev. 0.6
D4
R/W
MS2_PHOFF[14:8]
D3
R/W
D3
Function
Function
D2
D2
D1
D1
D0
D0

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