USB3280-AEZG-TR Standard Microsystems (SMSC), USB3280-AEZG-TR Datasheet - Page 24

• Manufacturer Part Number: USB3280-AEZG-TR
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.5 (11-15-07)
When the EOP is detected the state machine will enter the Strip EOP state and negate RXACTIVE
and RXVALID. After the EOP has been stripped the Receive State Machine will reenter the RX Wait
state and begin looking for the next packet.
The behavior of the Receive State Machine is described below:
Notes:
RXACTIVE and RXREADY are sampled on the rising edge of CLKOUT.
In the RX Wait state the receiver is always looking for SYNC.
The USB3280 asserts RXACTIVE when SYNC is detected (Strip SYNC state).
The USB3280 negates RXACTIVE when an EOP is detected and the elasticity buffer is empty
(Strip EOP state).
When RXACTIVE is asserted, RXVALID will be asserted if the RX Holding Register is full.
RXVALID will be negated if the RX Holding Register was not loaded during the previous byte time.
This will occur if 8 stuffed bits have been accumulated.
The SIE must be ready to consume a data byte if RXACTIVE and RXVALID are asserted (RX Data
state).
Figure 7.5
RXACTIVE, RXERROR and DATA signals.
The USB 2.0 Transceiver does NOT decode Packet ID's (PIDs). They are passed to the SIE for
decoding.
Figure
When a HS/FS PHY is in FS Mode there are approximately 40 CLKOUT cycles every byte time.
The Receive State Machine assumes that the SIE captures the data on the DATA bus if RXACTIVE
and RXVALID are asserted. In FS mode, RXVALID will only be asserted for one CLKOUT per byte
time.
In
The SYNC pattern received by a device can vary in length. These figures assume that all but the
last 12 bits have been consumed by the hubs between the device and the host controller.
Figure
7.5,
Figure 7.5 Receive Timing for a Handshake Packet (no CRC)
7.5,
shows the timing relationship between the received data (DP/DM), RXVALID,
Figure 7.6
Figure 7.6
and
and
Figure 7.7
Figure 7.7
DATASHEET
are timing examples of a HS/FS PHY when it is in HS mode.
24
the SYNC pattern on DP/DM is shown as one byte long.
Hi-Speed USB Device PHY with UTMI Interface
SMSC USB3280
Datasheet