MAX525AEAP Maxim Integrated Products, MAX525AEAP Datasheet - Page 11
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MAX525AEAP
Manufacturer Part Number
MAX525AEAP
Description
IC DAC QUAD LP 12BIT 20-SSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX525BCPP.pdf
(16 pages)
Specifications of MAX525AEAP
Settling Time
12µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
4
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power Dissipation (max)
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MAX525AEAP+
Manufacturer:
AMPHENOL
Quantity:
8
Figure 5. Serial-Interface Timing Diagram
Figure 6. Detailed Serial-Interface Timing Diagram
The power-down lockout pin PDL disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL could also be
used to asynchronously wake up the device.
Any number of MAX525s can be daisy chained by con-
necting the DOUT pin of one device to the DIN pin of
the following device in the chain (Figure 7).
DOUT
Low-Power, Quad, 12-Bit Voltage-Output DAC
SCLK
DIN
CS
(MODE 0)
(MODE 1)
DOUT
SCLK
DOUT
DIN
CS
t
CSO
______________________________________________________________________________________
Power-Down Lockout ( PDL )
A1
A1
A1
t
CSS
Daisy Chaining Devices
1
t
MSB FROM
PREVIOUS WRITE
A0
MSB FROM
PREVIOUS WRITE
DS
A0
t
A0
DH
C1
C1
C1
C0 D11 D10 D9
C0
C0
t
CL
D11 D10 D9
D11 D10 D9
t
CH
DATA PACKET (N-1)
DATA PACKET (N-1)
DATA PACKET (N)
D8
D8
D8
8
D7
D7
D7
9
Since the MAX525’s DOUT pin has an internal active
pullup, the DOUT sink/source capability determines the
time required to discharge/charge a capacitive load.
Refer to the serial-data-out V
in the Electrical Characteristics.
Figure 8 shows an alternate method of connecting sev-
eral MAX525s. In this configuration, the data bus is
common to all devices; data is not shifted through a
daisy chain. More I/O lines are required in this configu-
ration because a dedicated chip-select input (CS) is
required for each IC.
D6
D6
D6
D5
with Serial Interface
D5
D5
t
DO1
D4
D4
D4
t
D3
CP
t
DO2
D3
D3
D2
D2
D2
D1
D1
D1
D0
D0
D0
t
CSH
16
OH
A1
A1
DATA PACKET (N)
DATA PACKET (N)
COMMAND
EXECUTED
and V
t
CS1
t
CSW
OL
specifications
11