AD5382BST-5 Analog Devices Inc, AD5382BST-5 Datasheet - Page 14

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AD5382BST-5

Manufacturer Part Number
AD5382BST-5
Description
IC DAC 14BIT 32CH 5V 100-LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5382BST-5

Design Resources
32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) AD5382 Channel Monitor Function (CN0012)
Settling Time
8µs
Number Of Bits
14
Data Interface
Serial, Parallel
Number Of Converters
32
Voltage Supply Source
Single Supply
Power Dissipation (max)
65mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
For Use With
EVAL-AD5382EB - BOARD EVAL FOR AD5382
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD5382
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 10. Pin Function Descriptions
Mnemonic
VOUTx
SIGNAL_GND(1–4)
DAC_GND(1–4)
AGND(1–4)
AVDD(1–4)
DGND
DVDD
REFGND
REFOUT/REFIN
Function
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 kΩ to ground. Typical output impedance is 0.5 Ω.
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5382.
Ground Reference point for the Internal 14-Bit DAC. Each group of eight channels contains a DAC_GND pin. These
pins shound be connected to the AGND plane.
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
Analog Supply Pins. Each group of eight channels has a separate AVDD pin. These pins are internally shorted and
should be decoupled with a 0.1 μF ceramic capacitor and a 10 μF tantalum capacitor. Operating range for the
AD5382-5 is 4.5 V to 5.5 V; operating range for the AD5382-3 is 2.7 V to 3.6 V.
Ground for All Digital Circuitry.
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with 0.1 μF ceramic and 10 μF tantalum capacitors to DGND.
Ground Reference Point for the Internal Reference.
Reference Output when the Internal Reference is Selected. The AD5382 contains a common REFOUT/REFIN pin. If the
application requires an external reference, it can be applied to this pin, and the internal reference can be disabled
via the control register. The default for this pin is a reference input.
REFOUT/REFIN
SIGNAL_GND4
SIGNAL_GND1
DAC_GND4
DAC_GND1
REFGND
VOUT27
FIFO EN
VOUT24
VOUT25
VOUT26
VOUT28
VOUT29
VOUT30
VOUT31
AGND4
AGND1
AVDD4
AVDD1
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
CLR
10
11
13
14
15
16
17
18
19
20
22
23
24
25
12
21
1
2
3
4
5
6
7
8
9
PIN 1
IDENTIFIER
Figure 8. 100-Lead LQFP Pin Configuration
Rev. B | Page 14 of 40
(Not to Scale)
AD5382
TOP VIEW
75
74
73
72
70
69
68
67
66
65
64
63
61
60
59
58
57
56
55
54
53
51
71
62
52
RESET
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
REG0
REG1
VOUT23
VOUT22
VOUT21
VOUT20
AVDD3
AGND3
DAC_GND3
SIGNAL_GND3
VOUT19
VOUT18
VOUT17
VOUT16
AVDD2
AGND2

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