ATF1508AS-10JU84 Atmel, ATF1508AS-10JU84 Datasheet
ATF1508AS-10JU84
Specifications of ATF1508AS-10JU84
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ATF1508AS-10JU84 Summary of contents
Page 1
... Pull-up Option on JTAG Pins TMS and TDI • Advanced Power Management Features – Edge-controlled Power-down “L” – Individual Macrocell Power Option – Disable ITD on Global Clocks, Inputs and I/O for “Z” Parts High- performance EE PLD ATF1508AS ATF1508ASL Rev. 0784P–PLD–7/05 1 ...
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... I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 GND 11 I/O 12 I/O 13 I/O 14 I/O/TMS 15 I/O 16 I/O 17 VCCIO 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 I/O 24 I/O 25 ATF1508AS( I/O I I/O I/O/PD1 3 72 GND I I/O/TDO VCCIO 5 70 I/O I/O/TDI 6 69 I/O I I/O I I/O I VCCIO I I/O I/O ...
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... Block Diagram 0784P–PLD–7/05 16 ATF1508AS(L) 3 ...
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... I/O pin also feeds into the global bus. The switch matrix in each logic block then selects 40 individual signals from the global bus. Each macrocell also generates a foldback logic term that goes to a regional bus. Cascade logic between macrocells in the ATF1508AS allows fast, efficient generation of complex logic functions. The ATF1508AS contains eight such logic chains, each capable of creating sum term logic with a fan- product terms ...
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... Flip-flop The ATF1508AS’s flip-flop has very flexible data and control functions. The data input can come from either the XOR gate, from a separate product term or directly from the I/O pin. Selecting the separate product term allows creation of a buried registered feedback within a combinatorial output macrocell ...
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... Figure 1. ATF1508AS Macrocell Programmable The ATF1508AS offers the option of programming all input and I/O pins so that “pin-keeper” circuits can be utilized. When any pin is driven high or low and then subsequently left floating, Pin-keeper it will stay at that previous high- or low-level. This circuitry prevents unused input and I/O lines ...
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... MHz. To further reduce power, each ATF1508AS macrocell has a Reduced-power bit feature. This feature allows individual macrocells to be configured for maximum power savings. This feature may be selected as a design option. ...
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... Software Support Power-up Reset The ATF1508AS is designed with a power-up reset, a feature critical for state machine initial- ization point delayed slightly from V the state of each output will depend on the polarity of its buffer. However, due to the asynchro- nous nature of reset and uncertainty of how V conditions are required: 1 ...
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... If JTAG (BST or ISP) is not needed, then the four JTAG control pins are available as I/O pins. JTAG The ATF1508AS contains I/O pins and four input pins, depending on the device type and package type selected. Each input pin and I/O pin has its own boundary-scan cell (BSC) Boundary-scan in order to support boundary-scan testing as described in detail by IEEE Standard 1149 ...
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... Boundary-scan Test Operation in the ATF1508AS and have been scheduled to con- Definition form to the IEEE 1149.1 standard. Language (BSDL) Models for the ATF1508 ATF1508AS(L) 10 The ATF1508AS has a pull-up option on TMS and TDI pins. This feature is selected as a design option. TDO OEJ OUTJ ...
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... PCI Compliance The ATF1508AS also supports the growing need in the industry to support the new Peripheral Component Interconnect (PCI) interface standard in PCI-based designs and specifications. The PCI interface calls for high current drivers, which are much larger than the traditional TTL drivers. ...
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... Current High (Test High) I Switching OL(AC) Current Low (Test Point) I Low Clamp Current CL SLEW Output Rise Slew Rate R SLEW Output Fall Slew Rate F Notes: 1. Equation 11 OUT 2. Equation 78 ATF1508AS(L) 12 Conditions ( 2. OUT mA OUT Conditions 0 < V 1.4 OUT 1.4 < V < 2.4 OUT 3.1 < ...
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... Power-down The ATF1508AS includes two pins for optional pin-controlled power-down feature. When this mode is enabled, the PD pin acts as the power-down pin. When the PD1 and PD2 pin is high, Mode the device supply current is reduced to less than 10 mA. During power-down, all output data and internal logic states are latched and held ...
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... V OH Output High Voltage (TTL) Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec refers to the current in the reduced-power mode when macrocell reduced-power is turned ON. CC3 ATF1508AS(L) 14 Commercial 0°C - 70°C 2.7V - 3.6V Condition ...
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... Timing Model U Input Test Waveforms and Measurement Levels Output AC Test Loads Note: *Numbers in parenthesis refer to 3.0V operating conditions (preliminary). 0784P–PLD–7/05 Typ Max 1.5 ns typical F (3.0V)* (703 )* (8060 )* ATF1508AS(L) Units Conditions 0V 1.0 MHz 0V 1.0 MHz OUT 15 ...
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... FREQUENCY (MHz) SUPPLY CURRENT VS. SUPPLY VOLTAGE PIN-CONTROLLED POWER-DOWN MODE (T = 25° 1100.0 1000.0 STANDARD POWER 900.0 800.0 REDUCED POWER MODE 700.0 4.50 4.75 5.00 V (V) CC ATF1508AS(L) 16 200.0 150.0 100.0 50.0 0.0 5.25 5.50 0 -10 -20 -30 -40 -50 -60 5.25 5.50 -20 -40 -60 ...
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... A 3.5 4.0 4.5 5 25°C) A 3.5 4.0 4.5 5.0 = 25°C) A 5.25 5.50 ATF1508AS(L) NORMALIZED TCO VS. SUPPLY VOLTAGE (T = 25°C) A 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 SUPPLY VOLTAGE (V) NORMALIZED TSU VS. SUPPLY VOLTAGE (T = 25°C) A 1.20 1 ...
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... NORMALIZED TSU VS. TEMPERATURE (V CC 1.20 1.10 1.00 0.90 0.80 -40 0 TEMPERATURE (C) ATF1508AS( 5.0V 0784P–PLD–7/05 ...
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... OFF 5V pF) CCIO L 0784P–PLD–7/05 -7 -10 -15 Min Max Min Max Min 7 0.5 0.5 1 125 100 76 125 100 76.9 166.7 125 100 0.5 0.5 0.5 0 0.8 0 1.5 ATF1508AS(L) -20 -25 Max Min Max Min Max 1 41 Units MHz ...
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... Register Clear Time CLR t Switch Matrix Delay UIM (2) t Reduced-power Adder RPA Notes: 1. See ordering information for valid part numbers. 2. The t parameter must be added to the t RPA power mode. ATF1508AS(L) 20 (1) -7 -10 -15 Min Max Min Max Min 2.5 2.0 5 5.5 4.0 5.0 4 ...
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... ATF1508AS Dedicated Pinouts Dedicated Pin 84-lead J-lead INPUT/OE2/GCLK2 INPUT/GCLR INPUT/OE1 INPUT/GCLK1 I/O /GCLK3 I (1, 2) I/O / TDI(JTAG) I/O / TMS(JTAG) I/O / TCK(JTAG) I/O / TDO(JTAG) GND 7,19,32,42, 47,59,72,82 VCCINT VCCIO 13,26,38, N SIGNAL PINS # USER I/O PINS OE (1, 2) Global OE Pins GCLR Global Clear Pin GCLK ( ...
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... ATF1508AS I/O Pinouts 84-lead 100-lead MC PLB J-lead PQFP 1 A – – – PD1 4 A – – – – 100 9 A – – – – – – – – – – – – – – – – – – – – – ...
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... ATF1508AS I/O Pinouts (Continued) 84-lead 100-lead MC PLB J-lead PQFP 66 E – – PD2 68 E – – – – – – – – – – – – – – – – – – – – – – – – – – TCK 0784P– ...
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... The recommended replacement package for QC160 is the AU100. Using “C” Product for Industrial To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device (7 ns “C” “I”) and de-rate power by 30%. ATF1508AS Green Package Options (Pb/Halide-free/RoHS Compliant ...
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... The last time buy is Sept. 30, 2005 for shaded parts. Using “C” Product for Industrial To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device (7 ns “C” “I”) and de-rate power by 30%. ATF1508ASL Green Package Options (Pb/Halide-free/RoHS Compliant ...
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... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R ATF1508AS(L) 26 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...
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... C 2325 Orchard Parkway San Jose, CA 95131 R 0784P–PLD–7/ TITLE 100Q1, 100-lead Body, 3.2 mm Footprint, 0.65 mm Pitch, Plastic Quad Flat Package (PQFP) ATF1508AS(L) COMMON DIMENSIONS (Unit of Measure = mm) JEDEC STANDARD MS-022, GC-1 SYMBOL MIN NOM MAX A – 3.04 3.4 A1 0.25 0.33 ...
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... This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.08 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R ATF1508AS( TITLE 100A, 100-lead Body Size, 1 ...
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... A1 is defined as the distance from the seating plane to the lowest point of the package body. 2325 Orchard Parkway San Jose, CA 95131 R 0784P–PLD–7/ TITLE 160Q1, 160-lead Body, 3.2 Form Opt., Plastic Quad Flat Pack (PQFP) ATF1508AS( Bottom View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A1 0.25 – ...
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... Revision History Revision 0784P 0784O ATF1508AS(L) 30 Comments Green package options added. The ATF1508ASL-25 commercial speed offering was obsoleted in 2002 and replaced by the ATF1508ASL-20 commercial speed grade. 0784P–PLD–7/05 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...