ATF750C-10NM/883 Atmel, ATF750C-10NM/883 Datasheet - Page 11
![IC PLD EE CMOS 10NS 28LCC](/photos/6/71/67113/28l-lcc_sml.jpg)
ATF750C-10NM/883
Manufacturer Part Number
ATF750C-10NM/883
Description
IC PLD EE CMOS 10NS 28LCC
Manufacturer
Atmel
Series
ATF750C(L)r
Datasheet
1.ATF750C-7JC.pdf
(25 pages)
Specifications of ATF750C-10NM/883
Programmable Type
In System Programmable (min 1K program/erase cycles)
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Macrocells
10
Number Of I /o
10
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-LCC
Features
Programmable
Voltage
5V
Memory Type
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
21. Power-up Reset
22. Pin Capacitance
0776L–PLD–11/08
The registers in the ATF750C(L)s are designed to reset during power-up. At a point delayed
slightly from V
depend on the polarity of the output buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature
of reset and the uncertainty of how V
required:
f = 1 MHz, T = 25°C
Note:
Parameter
t
V
C
C
1. The V
2. After reset occurs, all input and feedback setup times must be met before driving the
3. The clock pin, or signals from which clock terms are derived, must remain stable
PR
RST
IN
OUT
clock terms or pin high, and
during t
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100%
tested.
CC
PR
CC
rise must be monotonic,
.
crossing V
(1)
Description
Power-up Reset Time
Power-up Reset Voltage
Typ
5
6
RST
, all registers will be reset to the low state. The output state will
CC
Max
8
8
actually rises in the system, the following conditions are
Units
pF
pF
Typ
600
2.0
Conditions
V
V
IN
OUT
= 0V
= 0V
ATF750C(L)
1000
Max
4.5
Units
ns
V
11