EPM7064LC68-12 Altera, EPM7064LC68-12 Datasheet - Page 13
![IC MAX 7000 CPLD 64 68-PLCC](/photos/6/71/67106/544-68-plcc_sml.jpg)
EPM7064LC68-12
Manufacturer Part Number
EPM7064LC68-12
Description
IC MAX 7000 CPLD 64 68-PLCC
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7064LC68-12
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
12.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
4
Number Of Macrocells
64
Number Of Gates
1250
Number Of I /o
52
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
4
Family Name
MAX 7000
# Macrocells
64
Number Of Usable Gates
1250
Frequency (max)
125MHz
Propagation Delay Time
12ns
Number Of Logic Blocks/elements
4
# I/os (max)
52
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2301-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7064LC68-12
Manufacturer:
ALTERA
Quantity:
1 670
Company:
Part Number:
EPM7064LC68-12
Manufacturer:
ALTERA
Quantity:
20
Part Number:
EPM7064LC68-12
Manufacturer:
ALTERA
Quantity:
20 000
Part Number:
EPM7064LC68-12AA
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EPM7064LC68-12N
Manufacturer:
ALTERA
Quantity:
12 388
Figure 6. Parallel Expanders
Altera Corporation
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
36 Signals
from PIA
Expanders
16 Shared
The compiler can allocate up to three sets of up to five parallel expanders
automatically to the macrocells that require additional product terms.
Each set of five parallel expanders incurs a small, incremental timing
delay (t
Compiler uses the five dedicated product terms within the macrocell and
allocates two sets of parallel expanders; the first set includes five product
terms and the second set includes four product terms, increasing the total
delay by 2 × t
Two groups of 8 macrocells within each LAB (e.g., macrocells
1 through 8 and 9 through 16) form two chains to lend or borrow parallel
expanders. A macrocell borrows parallel expanders from lower-
numbered macrocells. For example, macrocell 8 can borrow parallel
expanders from macrocell 7, from macrocells 7 and 6, or from macrocells
7, 6, and 5. Within each group of 8, the lowest-numbered macrocell can
only lend parallel expanders and the highest-numbered macrocell can
only borrow them.
borrowed from a neighboring macrocell.
PEXP
). For example, if a macrocell requires 14 product terms, the
PEXP
Product-
Product-
Select
Select
Matrix
Matrix
Term
Term
.
MAX 7000 Programmable Logic Device Family Data Sheet
Figure 6
Macrocell
Previous
From
shows how parallel expanders can be
Macrocell
To Next
Preset
Clock
Clear
Preset
Clock
Clear
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic
13