EPM570T144C4N Altera, EPM570T144C4N Datasheet - Page 34

• Manufacturer Part Number: EPM570T144C4N
• Description: IC MAX II CPLD 570 LE 144-TQFP
• Manufacturer: Altera
• Series: MAX® IIr

Specifications of EPM570T144C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 5.4ns
• Voltage Supply - Internal: 2.5V, 3.3V
• Number Of Logic Elements/blocks: 570
• Number Of Macrocells: 440
• Number Of I /o: 116
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-TQFP, 144-VQFP
• Voltage: 2.5V, 3.3V
• Memory Type: FLASH
• Number Of Logic Elements/cells: 570
• No. Of I/o's: 116
• Propagation Delay: 7ns
• Global Clock Setup Time: 1.5ns
• Frequency: 247.5MHz
• Supply Voltage Range: 2.375V To 2.625V, 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 544-1319; EPM570T144C4N

2–26
Figure 2–21. Column I/O Block Connection to the Interconnect
Note to
(1) Each of the four IOEs in the column I/O block can have one data_out or fast_out output, one OE output, and one data_in input.
I/O Standards and Banks
MAX II Device Handbook
Figure
Local Interconnect
2–21:
I/O Block
LAB Local
Interconnect
Figure 2–21
MAX II device IOEs support the following I/O standards:
■
■
■
■
■
R4 Interconnects
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
data_out
C4 Interconnects
[3..0]
shows how a column I/O block connects to the logic array.
LAB
4
[3..0]
OE
4
Column I/O Block
Interconnect
LAB Local
Interconnect
fast_out
Fast I/O
(Note 1)
[3..0]
Path
LAB
4
LAB Column
Clock [3..0]
4
data_in
[3..0]
C4 Interconnects
© October 2008 Altera Corporation
Column I/O
Block Contains
Up To 4 IOEs
LAB Local
Interconnect
Chapter 2: MAX II Architecture
LAB
I/O Structure