EPM7064SLI84-7 Altera, EPM7064SLI84-7 Datasheet - Page 7
![IC MAX 7000 CPLD 64 84-PLCC](/photos/6/70/67059/544-84-plcc_sml.jpg)
EPM7064SLI84-7
Manufacturer Part Number
EPM7064SLI84-7
Description
IC MAX 7000 CPLD 64 84-PLCC
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7064SLI84-7
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
4
Number Of Macrocells
64
Number Of Gates
1250
Number Of I /o
68
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
84-PLCC
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
4
Family Name
MAX 7000S
# Macrocells
64
Number Of Usable Gates
1250
Frequency (max)
166.7MHz
Propagation Delay Time
7.5ns
Number Of Logic Blocks/elements
4
# I/os (max)
68
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2018
EPM7064SLI84-7
EPM7064SLI84-7
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7064SLI84-7
Manufacturer:
ALTERA
Quantity:
2 490
Company:
Part Number:
EPM7064SLI84-7
Manufacturer:
ALTERA
Quantity:
2 490
Company:
Part Number:
EPM7064SLI84-7
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Quantity:
304
Company:
Part Number:
EPM7064SLI84-7N
Manufacturer:
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Quantity:
2 630
Company:
Part Number:
EPM7064SLI84-7N
Manufacturer:
ALTERA
Quantity:
2 630
Figure 1. EPM7032, EPM7064 & EPM7096 Device Block Diagram
Altera Corporation
INPUT/GLCK1
INPUT/GCLRn
INPUT/OE1
INPUT/OE2
8 to 16
I/O pins
8 to 16
I/O pins
Control
Control
Block
Block
I/O
I/O
8 to 16
8 to 16
LAB A
LAB C
The MAX 7000 architecture includes four dedicated inputs that can
be used as general-purpose inputs or as high-speed, global control
signals (clock, clear, and two output enable signals) for each
macrocell and I/O pin.
EPM7064, and EPM7096 devices.
Macrocells
Macrocells
33 to 48
1 to 16
8 to 16
8 to 16
16
16
MAX 7000 Programmable Logic Device Family Data Sheet
36
36
PIA
Figure 1
36
36
16
8 to 16
16
8 to 16
Macrocells
Macrocells
shows the architecture of EPM7032,
17 to 32
49 to 64
LAB B
LAB D
8 to 16
8 to 16
Control
Control
Block
Block
I/O
I/O
8 to 16
I/O pins
8 to 16
I/O pins
7